1 /*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #ifndef ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
18 #define ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
19
20 #include <stdint.h>
21 #include <memory>
22 #include <vector>
23
24 #include <android-base/logging.h>
25
26 #include "base/arena_containers.h"
27 #include "base/macros.h"
28 #include "dwarf/register.h"
29 #include "offsets.h"
30 #include "utils/arm64/managed_register_arm64.h"
31 #include "utils/assembler.h"
32
33 // TODO(VIXL): Make VIXL compile with -Wshadow.
34 #pragma GCC diagnostic push
35 #pragma GCC diagnostic ignored "-Wshadow"
36 #include "aarch64/disasm-aarch64.h"
37 #include "aarch64/macro-assembler-aarch64.h"
38 #pragma GCC diagnostic pop
39
40 namespace art {
41
42 class Arm64InstructionSetFeatures;
43
44 namespace arm64 {
45
DWARFReg(vixl::aarch64::CPURegister reg)46 static inline dwarf::Reg DWARFReg(vixl::aarch64::CPURegister reg) {
47 if (reg.IsFPRegister()) {
48 return dwarf::Reg::Arm64Fp(reg.GetCode());
49 } else {
50 DCHECK_LT(reg.GetCode(), 31u); // X0 - X30.
51 return dwarf::Reg::Arm64Core(reg.GetCode());
52 }
53 }
54
55 #define MEM_OP(...) vixl::aarch64::MemOperand(__VA_ARGS__)
56
57 enum LoadOperandType {
58 kLoadSignedByte,
59 kLoadUnsignedByte,
60 kLoadSignedHalfword,
61 kLoadUnsignedHalfword,
62 kLoadWord,
63 kLoadCoreWord,
64 kLoadSWord,
65 kLoadDWord
66 };
67
68 enum StoreOperandType {
69 kStoreByte,
70 kStoreHalfword,
71 kStoreWord,
72 kStoreCoreWord,
73 kStoreSWord,
74 kStoreDWord
75 };
76
77 class Arm64Assembler final : public Assembler {
78 public:
79 explicit Arm64Assembler(
80 ArenaAllocator* allocator, const Arm64InstructionSetFeatures* features = nullptr);
81
~Arm64Assembler()82 virtual ~Arm64Assembler() {}
83
GetVIXLAssembler()84 vixl::aarch64::MacroAssembler* GetVIXLAssembler() { return &vixl_masm_; }
85
86 // Finalize the code.
87 void FinalizeCode() override;
88
89 // Size of generated code.
90 size_t CodeSize() const override;
91 const uint8_t* CodeBufferBaseAddress() const override;
92
93 // Copy instructions out of assembly buffer into the given region of memory.
94 void FinalizeInstructions(const MemoryRegion& region) override;
95
96 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs);
97
98 void SpillRegisters(vixl::aarch64::CPURegList registers, int offset);
99 void UnspillRegisters(vixl::aarch64::CPURegList registers, int offset);
100
101 // Jump to address (not setting link register)
102 void JumpTo(ManagedRegister m_base, Offset offs, ManagedRegister m_scratch);
103
104 //
105 // Heap poisoning.
106 //
107
108 // Poison a heap reference contained in `reg`.
109 void PoisonHeapReference(vixl::aarch64::Register reg);
110 // Unpoison a heap reference contained in `reg`.
111 void UnpoisonHeapReference(vixl::aarch64::Register reg);
112 // Poison a heap reference contained in `reg` if heap poisoning is enabled.
113 void MaybePoisonHeapReference(vixl::aarch64::Register reg);
114 // Unpoison a heap reference contained in `reg` if heap poisoning is enabled.
115 void MaybeUnpoisonHeapReference(vixl::aarch64::Register reg);
116
117 // Emit code checking the status of the Marking Register, and aborting
118 // the program if MR does not match the value stored in the art::Thread
119 // object.
120 //
121 // Argument `temp` is used as a temporary register to generate code.
122 // Argument `code` is used to identify the different occurrences of
123 // MaybeGenerateMarkingRegisterCheck and is passed to the BRK instruction.
124 void GenerateMarkingRegisterCheck(vixl::aarch64::Register temp, int code = 0);
125
Bind(Label * label ATTRIBUTE_UNUSED)126 void Bind(Label* label ATTRIBUTE_UNUSED) override {
127 UNIMPLEMENTED(FATAL) << "Do not use Bind(Label*) for ARM64";
128 }
Jump(Label * label ATTRIBUTE_UNUSED)129 void Jump(Label* label ATTRIBUTE_UNUSED) override {
130 UNIMPLEMENTED(FATAL) << "Do not use Jump(Label*) for ARM64";
131 }
132
Bind(vixl::aarch64::Label * label)133 void Bind(vixl::aarch64::Label* label) {
134 vixl_masm_.Bind(label);
135 }
Jump(vixl::aarch64::Label * label)136 void Jump(vixl::aarch64::Label* label) {
137 vixl_masm_.B(label);
138 }
139
reg_x(int code)140 static vixl::aarch64::Register reg_x(int code) {
141 CHECK(code < kNumberOfXRegisters) << code;
142 if (code == SP) {
143 return vixl::aarch64::sp;
144 } else if (code == XZR) {
145 return vixl::aarch64::xzr;
146 }
147 return vixl::aarch64::Register::GetXRegFromCode(code);
148 }
149
reg_w(int code)150 static vixl::aarch64::Register reg_w(int code) {
151 CHECK(code < kNumberOfWRegisters) << code;
152 if (code == WSP) {
153 return vixl::aarch64::wsp;
154 } else if (code == WZR) {
155 return vixl::aarch64::wzr;
156 }
157 return vixl::aarch64::Register::GetWRegFromCode(code);
158 }
159
reg_d(int code)160 static vixl::aarch64::VRegister reg_d(int code) {
161 return vixl::aarch64::VRegister::GetDRegFromCode(code);
162 }
163
reg_s(int code)164 static vixl::aarch64::VRegister reg_s(int code) {
165 return vixl::aarch64::VRegister::GetSRegFromCode(code);
166 }
167
168 private:
169 // VIXL assembler.
170 vixl::aarch64::MacroAssembler vixl_masm_;
171
172 // Used for testing.
173 friend class Arm64ManagedRegister_VixlRegisters_Test;
174 };
175
176 } // namespace arm64
177 } // namespace art
178
179 #endif // ART_COMPILER_UTILS_ARM64_ASSEMBLER_ARM64_H_
180