Searched refs:base_in (Results 1 – 2 of 2) sorted by relevance
| /art/compiler/utils/x86/ |
| D | assembler_x86.h | 103 void SetSIB(ScaleFactor scale_in, Register index_in, Register base_in) { in SetSIB() argument
106 encoding_[1] = (scale_in << 6) | (index_in << 3) | base_in; in SetSIB()
153 Address(Register base_in, int32_t disp) { in Address() argument
154 Init(base_in, disp); in Address()
157 Address(Register base_in, int32_t disp, AssemblerFixup *fixup) { in Address() argument
158 Init(base_in, disp); in Address()
162 Address(Register base_in, Offset disp) { in Address() argument
163 Init(base_in, disp.Int32Value()); in Address()
166 Address(Register base_in, FrameOffset disp) { in Address() argument
167 CHECK_EQ(base_in, ESP); in Address()
[all …]
|
| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64.h | 138 void SetSIB(ScaleFactor scale_in, CpuRegister index_in, CpuRegister base_in) { in SetSIB() argument
141 if (base_in.NeedsRex()) { in SetSIB()
148 static_cast<uint8_t>(base_in.LowBits()); in SetSIB()
189 Address(CpuRegister base_in, int32_t disp) { in Address() argument
190 Init(base_in, disp); in Address()
193 Address(CpuRegister base_in, Offset disp) { in Address() argument
194 Init(base_in, disp.Int32Value()); in Address()
197 Address(CpuRegister base_in, FrameOffset disp) { in Address() argument
198 CHECK_EQ(base_in.AsRegister(), RSP); in Address()
202 Address(CpuRegister base_in, MemberOffset disp) { in Address() argument
[all …]
|