Searched refs:kNumberOfCpuRegisters (Results 1 – 16 of 16) sorted by relevance
| /art/runtime/arch/x86/ |
| D | context_x86.cc | 36 eip_ = X86Context::kBadGprBase + kNumberOfCpuRegisters; in Reset()
45 frame_info.CoreSpillMask() & ~(static_cast<uint32_t>(-1) << kNumberOfCpuRegisters); in FillCalleeSaves()
78 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in SetGPR()
95 volatile uintptr_t gprs[kNumberOfCpuRegisters + 1]; in DoLongJump()
96 for (size_t i = 0; i < kNumberOfCpuRegisters; ++i) { in DoLongJump()
97 …gprs[kNumberOfCpuRegisters - i - 1] = gprs_[i] != nullptr ? *gprs_[i] : X86Context::kBadGprBase + … in DoLongJump()
104 uintptr_t esp = gprs[kNumberOfCpuRegisters - ESP - 1] - sizeof(intptr_t); in DoLongJump()
105 gprs[kNumberOfCpuRegisters] = esp; in DoLongJump()
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| D | context_x86.h | 53 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in IsAccessibleGPR()
58 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in GetGPRAddress()
63 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in GetGPR()
101 uintptr_t* gprs_[kNumberOfCpuRegisters];
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| D | registers_x86.h | 36 kNumberOfCpuRegisters = 8, enumerator
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| D | callee_save_frame_x86.h | 32 (1 << art::x86::kNumberOfCpuRegisters); // Fake return address callee save.
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| /art/runtime/arch/x86_64/ |
| D | context_x86_64.cc | 35 rip_ = X86_64Context::kBadGprBase + kNumberOfCpuRegisters; in Reset()
44 frame_info.CoreSpillMask() & ~(static_cast<uint32_t>(-1) << kNumberOfCpuRegisters); in FillCalleeSaves()
90 CHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in SetGPR()
107 uintptr_t gprs[kNumberOfCpuRegisters + 1]; in DoLongJump()
110 for (size_t i = 0; i < kNumberOfCpuRegisters; ++i) { in DoLongJump()
111 …gprs[kNumberOfCpuRegisters - i - 1] = gprs_[i] != nullptr ? *gprs_[i] : X86_64Context::kBadGprBase… in DoLongJump()
118 uintptr_t rsp = gprs[kNumberOfCpuRegisters - RSP - 1] - sizeof(intptr_t); in DoLongJump()
119 gprs[kNumberOfCpuRegisters] = rsp; in DoLongJump()
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| D | context_x86_64.h | 57 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in IsAccessibleGPR()
62 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in GetGPRAddress()
67 DCHECK_LT(reg, static_cast<uint32_t>(kNumberOfCpuRegisters)); in GetGPR()
92 uintptr_t* gprs_[kNumberOfCpuRegisters];
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| D | registers_x86_64.h | 45 kNumberOfCpuRegisters = 16, enumerator
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| D | callee_save_frame_x86_64.h | 32 (1 << art::x86_64::kNumberOfCpuRegisters); // Fake return address callee save.
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| /art/compiler/utils/x86_64/ |
| D | managed_register_x86_64.h | 46 const int kNumberOfCpuRegIds = kNumberOfCpuRegisters;
47 const int kNumberOfCpuAllocIds = kNumberOfCpuRegisters;
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| D | assembler_x86_64.cc | 4203 if (r != nullptr && *r >= Register::R8 && *r < Register::kNumberOfCpuRegisters) {
4207 if (x != nullptr && *x >= Register::R8 && *x < Register::kNumberOfCpuRegisters) {
4211 if (b != nullptr && *b >= Register::R8 && *b < Register::kNumberOfCpuRegisters) {
4233 if (dst != nullptr && *dst >= Register::R8 && *dst < Register::kNumberOfCpuRegisters) {
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| /art/compiler/utils/x86/ |
| D | managed_register_x86.h | 47 const int kNumberOfCpuRegIds = kNumberOfCpuRegisters;
48 const int kNumberOfCpuAllocIds = kNumberOfCpuRegisters;
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| /art/compiler/jni/quick/x86/ |
| D | calling_convention_x86.cc | 48 uint32_t result = 1 << kNumberOfCpuRegisters; in CalculateCoreCalleeSpillMask()
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| /art/compiler/jni/quick/x86_64/ |
| D | calling_convention_x86_64.cc | 54 uint32_t result = 1u << kNumberOfCpuRegisters; in CalculateCoreCalleeSpillMask()
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| /art/compiler/optimizing/ |
| D | code_generator_x86_64.cc | 519 DCHECK(0 <= ref_reg && ref_reg < kNumberOfCpuRegisters) << ref_reg; in EmitNativeCode()
610 DCHECK(0 <= ref_reg && ref_reg < kNumberOfCpuRegisters) << ref_reg; in EmitNativeCode()
1350 kNumberOfCpuRegisters, in CodeGeneratorX86_64()
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| D | code_generator_x86.cc | 507 DCHECK(0 <= ref_reg && ref_reg < kNumberOfCpuRegisters) << ref_reg; in EmitNativeCode()
592 DCHECK(0 <= ref_reg && ref_reg < kNumberOfCpuRegisters) << ref_reg; in EmitNativeCode()
1031 kNumberOfCpuRegisters, in CodeGeneratorX86()
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| D | intrinsics_x86.cc | 136 DCHECK(0 <= temp2 && temp2 < kNumberOfCpuRegisters) << temp2; in EmitNativeCode()
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