1 /*
2 * Copyright (C) 2014 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include "calling_convention_x86_64.h"
18
19 #include <android-base/logging.h>
20
21 #include "arch/instruction_set.h"
22 #include "arch/x86_64/jni_frame_x86_64.h"
23 #include "base/bit_utils.h"
24 #include "handle_scope-inl.h"
25 #include "utils/x86_64/managed_register_x86_64.h"
26
27 namespace art {
28 namespace x86_64 {
29
30 static constexpr Register kCoreArgumentRegisters[] = {
31 RDI, RSI, RDX, RCX, R8, R9
32 };
33 static_assert(kMaxIntLikeRegisterArguments == arraysize(kCoreArgumentRegisters));
34
35 static constexpr ManagedRegister kCalleeSaveRegisters[] = {
36 // Core registers.
37 X86_64ManagedRegister::FromCpuRegister(RBX),
38 X86_64ManagedRegister::FromCpuRegister(RBP),
39 X86_64ManagedRegister::FromCpuRegister(R12),
40 X86_64ManagedRegister::FromCpuRegister(R13),
41 X86_64ManagedRegister::FromCpuRegister(R14),
42 X86_64ManagedRegister::FromCpuRegister(R15),
43 // Hard float registers.
44 X86_64ManagedRegister::FromXmmRegister(XMM12),
45 X86_64ManagedRegister::FromXmmRegister(XMM13),
46 X86_64ManagedRegister::FromXmmRegister(XMM14),
47 X86_64ManagedRegister::FromXmmRegister(XMM15),
48 };
49
50 template <size_t size>
CalculateCoreCalleeSpillMask(const ManagedRegister (& callee_saves)[size])51 static constexpr uint32_t CalculateCoreCalleeSpillMask(
52 const ManagedRegister (&callee_saves)[size]) {
53 // The spilled PC gets a special marker.
54 uint32_t result = 1u << kNumberOfCpuRegisters;
55 for (auto&& r : callee_saves) {
56 if (r.AsX86_64().IsCpuRegister()) {
57 result |= (1u << r.AsX86_64().AsCpuRegister().AsRegister());
58 }
59 }
60 return result;
61 }
62
63 template <size_t size>
CalculateFpCalleeSpillMask(const ManagedRegister (& callee_saves)[size])64 static constexpr uint32_t CalculateFpCalleeSpillMask(const ManagedRegister (&callee_saves)[size]) {
65 uint32_t result = 0u;
66 for (auto&& r : callee_saves) {
67 if (r.AsX86_64().IsXmmRegister()) {
68 result |= (1u << r.AsX86_64().AsXmmRegister().AsFloatRegister());
69 }
70 }
71 return result;
72 }
73
74 static constexpr uint32_t kCoreCalleeSpillMask = CalculateCoreCalleeSpillMask(kCalleeSaveRegisters);
75 static constexpr uint32_t kFpCalleeSpillMask = CalculateFpCalleeSpillMask(kCalleeSaveRegisters);
76
77 static constexpr ManagedRegister kNativeCalleeSaveRegisters[] = {
78 // Core registers.
79 X86_64ManagedRegister::FromCpuRegister(RBX),
80 X86_64ManagedRegister::FromCpuRegister(RBP),
81 X86_64ManagedRegister::FromCpuRegister(R12),
82 X86_64ManagedRegister::FromCpuRegister(R13),
83 X86_64ManagedRegister::FromCpuRegister(R14),
84 X86_64ManagedRegister::FromCpuRegister(R15),
85 // No callee-save float registers.
86 };
87
88 static constexpr uint32_t kNativeCoreCalleeSpillMask =
89 CalculateCoreCalleeSpillMask(kNativeCalleeSaveRegisters);
90 static constexpr uint32_t kNativeFpCalleeSpillMask =
91 CalculateFpCalleeSpillMask(kNativeCalleeSaveRegisters);
92
93 // Calling convention
94
ReturnScratchRegister() const95 ManagedRegister X86_64JniCallingConvention::ReturnScratchRegister() const {
96 return ManagedRegister::NoRegister(); // No free regs, so assembler uses push/pop
97 }
98
ReturnRegisterForShorty(const char * shorty,bool jni ATTRIBUTE_UNUSED)99 static ManagedRegister ReturnRegisterForShorty(const char* shorty, bool jni ATTRIBUTE_UNUSED) {
100 if (shorty[0] == 'F' || shorty[0] == 'D') {
101 return X86_64ManagedRegister::FromXmmRegister(XMM0);
102 } else if (shorty[0] == 'J') {
103 return X86_64ManagedRegister::FromCpuRegister(RAX);
104 } else if (shorty[0] == 'V') {
105 return ManagedRegister::NoRegister();
106 } else {
107 return X86_64ManagedRegister::FromCpuRegister(RAX);
108 }
109 }
110
ReturnRegister()111 ManagedRegister X86_64ManagedRuntimeCallingConvention::ReturnRegister() {
112 return ReturnRegisterForShorty(GetShorty(), false);
113 }
114
ReturnRegister()115 ManagedRegister X86_64JniCallingConvention::ReturnRegister() {
116 return ReturnRegisterForShorty(GetShorty(), true);
117 }
118
IntReturnRegister()119 ManagedRegister X86_64JniCallingConvention::IntReturnRegister() {
120 return X86_64ManagedRegister::FromCpuRegister(RAX);
121 }
122
123 // Managed runtime calling convention
124
MethodRegister()125 ManagedRegister X86_64ManagedRuntimeCallingConvention::MethodRegister() {
126 return X86_64ManagedRegister::FromCpuRegister(RDI);
127 }
128
IsCurrentParamInRegister()129 bool X86_64ManagedRuntimeCallingConvention::IsCurrentParamInRegister() {
130 if (IsCurrentParamAFloatOrDouble()) {
131 return itr_float_and_doubles_ < kMaxFloatOrDoubleRegisterArguments;
132 } else {
133 size_t non_fp_arg_number = itr_args_ - itr_float_and_doubles_;
134 return /* method */ 1u + non_fp_arg_number < kMaxIntLikeRegisterArguments;
135 }
136 }
137
IsCurrentParamOnStack()138 bool X86_64ManagedRuntimeCallingConvention::IsCurrentParamOnStack() {
139 return !IsCurrentParamInRegister();
140 }
141
CurrentParamRegister()142 ManagedRegister X86_64ManagedRuntimeCallingConvention::CurrentParamRegister() {
143 DCHECK(IsCurrentParamInRegister());
144 if (IsCurrentParamAFloatOrDouble()) {
145 // First eight float parameters are passed via XMM0..XMM7
146 FloatRegister fp_reg = static_cast<FloatRegister>(XMM0 + itr_float_and_doubles_);
147 return X86_64ManagedRegister::FromXmmRegister(fp_reg);
148 } else {
149 size_t non_fp_arg_number = itr_args_ - itr_float_and_doubles_;
150 Register core_reg = kCoreArgumentRegisters[/* method */ 1u + non_fp_arg_number];
151 return X86_64ManagedRegister::FromCpuRegister(core_reg);
152 }
153 }
154
CurrentParamStackOffset()155 FrameOffset X86_64ManagedRuntimeCallingConvention::CurrentParamStackOffset() {
156 return FrameOffset(displacement_.Int32Value() + // displacement
157 static_cast<size_t>(kX86_64PointerSize) + // Method ref
158 itr_slots_ * sizeof(uint32_t)); // offset into in args
159 }
160
161 // JNI calling convention
162
X86_64JniCallingConvention(bool is_static,bool is_synchronized,bool is_critical_native,const char * shorty)163 X86_64JniCallingConvention::X86_64JniCallingConvention(bool is_static,
164 bool is_synchronized,
165 bool is_critical_native,
166 const char* shorty)
167 : JniCallingConvention(is_static,
168 is_synchronized,
169 is_critical_native,
170 shorty,
171 kX86_64PointerSize) {
172 }
173
CoreSpillMask() const174 uint32_t X86_64JniCallingConvention::CoreSpillMask() const {
175 return is_critical_native_ ? 0u : kCoreCalleeSpillMask;
176 }
177
FpSpillMask() const178 uint32_t X86_64JniCallingConvention::FpSpillMask() const {
179 return is_critical_native_ ? 0u : kFpCalleeSpillMask;
180 }
181
FrameSize() const182 size_t X86_64JniCallingConvention::FrameSize() const {
183 if (is_critical_native_) {
184 CHECK(!SpillsMethod());
185 CHECK(!HasLocalReferenceSegmentState());
186 CHECK(!HasHandleScope());
187 CHECK(!SpillsReturnValue());
188 return 0u; // There is no managed frame for @CriticalNative.
189 }
190
191 // Method*, PC return address and callee save area size, local reference segment state
192 CHECK(SpillsMethod());
193 const size_t method_ptr_size = static_cast<size_t>(kX86_64PointerSize);
194 const size_t pc_return_addr_size = kFramePointerSize;
195 const size_t callee_save_area_size = CalleeSaveRegisters().size() * kFramePointerSize;
196 size_t total_size = method_ptr_size + pc_return_addr_size + callee_save_area_size;
197
198 CHECK(HasLocalReferenceSegmentState());
199 total_size += kFramePointerSize;
200
201 CHECK(HasHandleScope());
202 total_size += HandleScope::SizeOf(kX86_64PointerSize, ReferenceCount());
203
204 // Plus return value spill area size
205 CHECK(SpillsReturnValue());
206 total_size += SizeOfReturnValue();
207
208 return RoundUp(total_size, kStackAlignment);
209 }
210
OutFrameSize() const211 size_t X86_64JniCallingConvention::OutFrameSize() const {
212 // Count param args, including JNIEnv* and jclass*.
213 size_t all_args = NumberOfExtraArgumentsForJni() + NumArgs();
214 size_t num_fp_args = NumFloatOrDoubleArgs();
215 DCHECK_GE(all_args, num_fp_args);
216 size_t num_non_fp_args = all_args - num_fp_args;
217 // The size of outgoing arguments.
218 size_t size = GetNativeOutArgsSize(num_fp_args, num_non_fp_args);
219
220 if (UNLIKELY(IsCriticalNative())) {
221 // We always need to spill xmm12-xmm15 as they are managed callee-saves
222 // but not native callee-saves.
223 static_assert((kCoreCalleeSpillMask & ~kNativeCoreCalleeSpillMask) == 0u);
224 static_assert((kFpCalleeSpillMask & ~kNativeFpCalleeSpillMask) != 0u);
225 static_assert(
226 kAlwaysSpilledMmxRegisters == POPCOUNT(kFpCalleeSpillMask & ~kNativeFpCalleeSpillMask));
227 size += kAlwaysSpilledMmxRegisters * kMmxSpillSize;
228 // Add return address size for @CriticalNative
229 // For normal native the return PC is part of the managed stack frame instead of out args.
230 size += kFramePointerSize;
231 }
232
233 size_t out_args_size = RoundUp(size, kNativeStackAlignment);
234 if (UNLIKELY(IsCriticalNative())) {
235 DCHECK_EQ(out_args_size, GetCriticalNativeStubFrameSize(GetShorty(), NumArgs() + 1u));
236 }
237 return out_args_size;
238 }
239
CalleeSaveRegisters() const240 ArrayRef<const ManagedRegister> X86_64JniCallingConvention::CalleeSaveRegisters() const {
241 if (UNLIKELY(IsCriticalNative())) {
242 DCHECK(!UseTailCall());
243 static_assert(std::size(kCalleeSaveRegisters) > std::size(kNativeCalleeSaveRegisters));
244 // TODO: Change to static_assert; std::equal should be constexpr since C++20.
245 DCHECK(std::equal(kCalleeSaveRegisters,
246 kCalleeSaveRegisters + std::size(kNativeCalleeSaveRegisters),
247 kNativeCalleeSaveRegisters,
248 [](ManagedRegister lhs, ManagedRegister rhs) { return lhs.Equals(rhs); }));
249 return ArrayRef<const ManagedRegister>(kCalleeSaveRegisters).SubArray(
250 /*pos=*/ std::size(kNativeCalleeSaveRegisters));
251 } else {
252 return ArrayRef<const ManagedRegister>(kCalleeSaveRegisters);
253 }
254 }
255
IsCurrentParamInRegister()256 bool X86_64JniCallingConvention::IsCurrentParamInRegister() {
257 return !IsCurrentParamOnStack();
258 }
259
IsCurrentParamOnStack()260 bool X86_64JniCallingConvention::IsCurrentParamOnStack() {
261 return CurrentParamRegister().IsNoRegister();
262 }
263
CurrentParamRegister()264 ManagedRegister X86_64JniCallingConvention::CurrentParamRegister() {
265 ManagedRegister res = ManagedRegister::NoRegister();
266 if (!IsCurrentParamAFloatOrDouble()) {
267 switch (itr_args_ - itr_float_and_doubles_) {
268 case 0: res = X86_64ManagedRegister::FromCpuRegister(RDI); break;
269 case 1: res = X86_64ManagedRegister::FromCpuRegister(RSI); break;
270 case 2: res = X86_64ManagedRegister::FromCpuRegister(RDX); break;
271 case 3: res = X86_64ManagedRegister::FromCpuRegister(RCX); break;
272 case 4: res = X86_64ManagedRegister::FromCpuRegister(R8); break;
273 case 5: res = X86_64ManagedRegister::FromCpuRegister(R9); break;
274 static_assert(5u == kMaxIntLikeRegisterArguments - 1, "Missing case statement(s)");
275 }
276 } else if (itr_float_and_doubles_ < kMaxFloatOrDoubleRegisterArguments) {
277 // First eight float parameters are passed via XMM0..XMM7
278 res = X86_64ManagedRegister::FromXmmRegister(
279 static_cast<FloatRegister>(XMM0 + itr_float_and_doubles_));
280 }
281 return res;
282 }
283
CurrentParamStackOffset()284 FrameOffset X86_64JniCallingConvention::CurrentParamStackOffset() {
285 CHECK(IsCurrentParamOnStack());
286 size_t args_on_stack = itr_args_
287 - std::min(kMaxFloatOrDoubleRegisterArguments,
288 static_cast<size_t>(itr_float_and_doubles_))
289 // Float arguments passed through Xmm0..Xmm7
290 - std::min(kMaxIntLikeRegisterArguments,
291 static_cast<size_t>(itr_args_ - itr_float_and_doubles_));
292 // Integer arguments passed through GPR
293 size_t offset = displacement_.Int32Value() - OutFrameSize() + (args_on_stack * kFramePointerSize);
294 CHECK_LT(offset, OutFrameSize());
295 return FrameOffset(offset);
296 }
297
HiddenArgumentRegister() const298 ManagedRegister X86_64JniCallingConvention::HiddenArgumentRegister() const {
299 CHECK(IsCriticalNative());
300 // RAX is neither managed callee-save, nor argument register, nor scratch register.
301 DCHECK(std::none_of(kCalleeSaveRegisters,
302 kCalleeSaveRegisters + std::size(kCalleeSaveRegisters),
303 [](ManagedRegister callee_save) constexpr {
304 return callee_save.Equals(X86_64ManagedRegister::FromCpuRegister(RAX));
305 }));
306 return X86_64ManagedRegister::FromCpuRegister(RAX);
307 }
308
309 // Whether to use tail call (used only for @CriticalNative).
UseTailCall() const310 bool X86_64JniCallingConvention::UseTailCall() const {
311 CHECK(IsCriticalNative());
312 // We always need to spill xmm12-xmm15 as they are managed callee-saves
313 // but not native callee-saves, so we can never use a tail call.
314 return false;
315 }
316
317 } // namespace x86_64
318 } // namespace art
319