/art/compiler/utils/arm/ |
D | jni_macro_assembler_arm_vixl.cc | 120 CHECK_GE(frame_size, (pushed_values + (method_reg.IsRegister() ? 1u : 0u)) * kFramePointerSize); in BuildFrame() 123 if (method_reg.IsRegister()) { in BuildFrame() 377 DCHECK(!loc1.IsRegister()); in NoSpillGap() 378 DCHECK(!loc2.IsRegister()); in NoSpillGap() 402 if (!first_src.IsRegister()) { in GetSpillChunkSize() 408 !srcs[start + 1u].IsRegister() && in GetSpillChunkSize() 424 srcs[end].IsRegister() && in GetSpillChunkSize() 433 srcs[end].IsRegister() && in GetSpillChunkSize() 457 DCHECK(loc.IsRegister()); in GetCoreRegisterMask() 465 DCHECK(srcs[start].IsRegister()); in UseStrdForChunk() [all …]
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/art/compiler/utils/ |
D | jni_macro_assembler.h | 50 DCHECK(reg.IsRegister()); in ArgumentLocation() 56 bool IsRegister() const { in IsRegister() function 57 return reg_.IsRegister(); in IsRegister() 61 DCHECK(IsRegister()); in GetRegister() 66 DCHECK(!IsRegister()); in GetFrameOffset()
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D | managed_register.h | 61 constexpr bool IsRegister() const { in IsRegister() function
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/art/compiler/optimizing/ |
D | locations.h | 145 bool IsRegister() const { in IsRegister() function 162 return IsRegister() || IsFpuRegister() || IsRegisterPair() || IsFpuRegisterPair(); in IsRegisterKind() 166 DCHECK(IsRegister() || IsFpuRegister()); in reg() 182 DCHECK(IsRegister()); in AsRegister() 452 if (loc.IsRegister()) { in Add() 461 if (loc.IsRegister()) { in Remove() 665 return input.IsRegister() in IsFixedInput()
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D | intrinsics_utils.h | 75 DCHECK(out.IsRegister()); // TODO: Replace this when we support output in memory. in EmitNativeCode()
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D | code_generator_x86_64.cc | 289 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode() 832 DCHECK(index_.IsRegister()); in EmitNativeCode() 1544 if (destination.IsRegister()) { in Move() 1546 if (source.IsRegister()) { in Move() 1565 if (source.IsRegister()) { in Move() 1584 if (source.IsRegister()) { in Move() 1601 if (source.IsRegister()) { in Move() 1621 DCHECK(location.IsRegister()); in MoveConstant() 1631 if (location.IsRegister()) { in AddLocationAsTemp() 1847 if (lhs.IsRegister()) { in GenerateTestAndBranch() [all …]
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D | register_allocator_linear_scan.cc | 133 DCHECK(location.IsRegister() || location.IsFpuRegister()); in BlockRegister() 134 LiveInterval* interval = location.IsRegister() in BlockRegister() 137 DataType::Type type = location.IsRegister() in BlockRegister() 142 if (location.IsRegister()) { in BlockRegister() 233 if (temp.IsRegister() || temp.IsFpuRegister()) { in ProcessInstruction() 292 if (input.IsRegister() || input.IsFpuRegister()) { in ProcessInstruction() 347 if (first.IsRegister() || first.IsFpuRegister()) { in ProcessInstruction() 357 } else if (output.IsRegister() || output.IsFpuRegister()) { in ProcessInstruction()
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D | locations.cc | 100 if (location.IsRegister() || location.IsFpuRegister()) { in operator <<()
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D | common_arm64.h | 67 DCHECK(location.IsRegister()) << location; in XRegisterFrom() 72 DCHECK(location.IsRegister()) << location; in WRegisterFrom() 164 if (location.IsRegister()) { in OperandFrom()
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D | common_arm.h | 66 DCHECK(location.IsRegister()) << location; in RegisterFrom() 191 if (location.IsRegister()) { in OperandFrom()
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D | code_generator_x86.cc | 307 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode() 1334 if (destination.IsRegister()) { in Move32() 1335 if (source.IsRegister()) { in Move32() 1344 if (source.IsRegister()) { in Move32() 1354 if (source.IsRegister()) { in Move32() 1443 DCHECK(location.IsRegister()); in MoveConstant() 1459 if (location.IsRegister()) { in AddLocationAsTemp() 1757 if (lhs.IsRegister()) { in GenerateTestAndBranch() 1947 if (true_loc.IsRegister()) { in VisitSelect() 2542 DCHECK(in.IsRegister()); in VisitNeg() [all …]
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D | register_allocator_graph_color.cc | 882 if (input.IsRegister() || input.IsFpuRegister()) { in CheckForFixedInputs() 907 if (out.IsRegister() || out.IsFpuRegister()) { in CheckForFixedOutput() 955 if (temp.IsRegister() || temp.IsFpuRegister()) { in CheckForTempLiveIntervals() 1062 DCHECK(location.IsRegister() || location.IsFpuRegister()); in BlockRegister() 1064 LiveInterval* interval = location.IsRegister() in BlockRegister() 1068 bool blocked_by_codegen = location.IsRegister() in BlockRegister() 1438 if (input.IsRegister() || input.IsFpuRegister()) { in FindCoalesceOpportunities() 1441 InterferenceNode* fixed_node = input.IsRegister() in FindCoalesceOpportunities()
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D | code_generator_arm_vixl.cc | 547 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode() 1795 if (!out.IsRegister() && !out.IsRegisterPair()) { in CanGenerateConditionalMove() 1807 if (out.IsRegister()) { in CanGenerateConditionalMove() 2496 if (destination.IsRegister()) { in Move32() 2497 if (source.IsRegister()) { in Move32() 2508 if (source.IsRegister()) { in Move32() 2517 if (source.IsRegister()) { in Move32() 2535 DCHECK(location.IsRegister()); in MoveConstant() 2548 if (location.IsRegister()) { in AddLocationAsTemp() 2724 DCHECK(cond_val.IsRegister()); in GenerateTestAndBranch() [all …]
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D | code_generator_arm64.cc | 346 DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); in EmitNativeCode() 720 DCHECK(index_.IsRegister()); in EmitNativeCode() 1109 if (loc.IsRegister()) { in FreeScratchLocation() 1307 DCHECK(location.IsRegister()); in MoveConstant() 1312 if (location.IsRegister()) { in AddLocationAsTemp() 1476 if (destination.IsRegister() || destination.IsFpuRegister()) { in MoveLocation() 1484 dst_type = destination.IsRegister() ? DataType::Type::kInt32 : DataType::Type::kFloat32; in MoveLocation() 1490 dst_type = destination.IsRegister() ? DataType::Type::kInt64 : DataType::Type::kFloat64; in MoveLocation() 1494 (destination.IsRegister() && !DataType::IsFloatingPointType(dst_type))); in MoveLocation() 1504 } else if (source.IsRegister()) { in MoveLocation() [all …]
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D | intrinsics_x86_64.cc | 1589 DCHECK(srcBegin.IsRegister()); in VisitStringGetCharsNoCheck() 2294 if (src.IsRegister()) { in GenBitCount() 2367 src.IsRegister()) { in GenOneBit() 2373 if (src.IsRegister()) { in GenOneBit() 2401 if (src.IsRegister()) { in GenOneBit() 2488 if (src.IsRegister()) { in GenLeadingZeros() 2561 if (src.IsRegister()) { in GenTrailingZeros()
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D | ssa_liveness_analysis.cc | 486 return other.IsRegister(); in SameRegisterKind()
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D | intrinsics_x86.cc | 570 if (codegen->GetInstructionSetFeatures().HasAVX2() && src.IsRegister()) { in GenLowestOneBit() 576 if (src.IsRegister()) { in GenLowestOneBit() 584 if (src.IsRegister()) { in GenLowestOneBit() 1417 DCHECK(srcBegin.IsRegister()); in VisitStringGetCharsNoCheck() 2211 if (src.IsRegister()) { in GenBitCount() 2280 if (src.IsRegister()) { in GenLeadingZeros() 2384 if (src.IsRegister()) { in GenTrailingZeros()
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D | ssa_liveness_analysis.h | 964 && (locations->InAt(0).IsRegister() in DefinitionRequiresRegister() 975 } else if (location.IsRegister() || location.IsRegisterPair()) { in DefinitionRequiresRegister()
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D | parallel_move_test.cc | 44 } else if (location.IsRegister()) { in DumpLocationForTest()
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D | register_allocation_resolver.cc | 499 return destination.IsRegister() in IsValidDestination()
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D | graph_visualizer.cc | 291 if (location.IsRegister()) { in DumpLocation()
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/art/disassembler/ |
D | disassembler_arm64.cc | 47 if (reg.IsRegister() && reg.Is64Bits()) { in AppendRegisterNameToOutput()
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/art/compiler/utils/arm64/ |
D | jni_macro_assembler_arm64.cc | 364 if (dest.IsRegister()) { in MoveArguments() 365 if (src.IsRegister() && src.GetRegister().Equals(dest.GetRegister())) { in MoveArguments() 368 if (src.IsRegister()) { in MoveArguments() 374 if (src.IsRegister()) { in MoveArguments() 388 if (!dest.IsRegister()) { in MoveArguments() 398 if (src.IsRegister()) { in MoveArguments() 803 core_reg_size + fp_reg_size + (method_reg.IsRegister() ? kXRegSizeInBytes : 0u)); in BuildFrame() 810 if (method_reg.IsRegister()) { in BuildFrame()
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/art/compiler/utils/x86_64/ |
D | jni_macro_assembler_x86_64.cc | 89 if (method_reg.IsRegister()) { in BuildFrame() 364 if (dest.IsRegister()) { in MoveArguments() 365 if (src.IsRegister() && src.GetRegister().Equals(dest.GetRegister())) { in MoveArguments() 368 if (src.IsRegister()) { in MoveArguments() 374 if (src.IsRegister()) { in MoveArguments() 388 if (!dest.IsRegister()) { in MoveArguments() 398 if (src.IsRegister()) { in MoveArguments()
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/art/compiler/utils/x86/ |
D | jni_macro_assembler_x86.cc | 79 (method_reg.IsRegister() ? kFramePointerSize /*method*/ : 0u); in BuildFrame() 84 if (method_reg.IsRegister()) { in BuildFrame() 311 if (UNLIKELY(dest.IsRegister())) { in MoveArguments() 315 CHECK(src.IsRegister()); in MoveArguments() 318 if (src.IsRegister()) { in MoveArguments()
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