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Searched refs:IsSRegister (Results 1 – 9 of 9) sorted by relevance

/art/compiler/utils/arm64/
Dmanaged_register_arm64.cc57 } else if (IsSRegister()) { in RegNo()
78 CHECK(IsWRegister() || IsSRegister()); in RegIdHigh()
80 if (IsSRegister()) { in RegIdHigh()
95 } else if (IsSRegister()) { in Print()
Dmanaged_register_arm64.h75 CHECK(IsSRegister()); in AsSRegister()
118 constexpr bool IsSRegister() const { in IsSRegister() function
129 return IsDRegister() || IsSRegister(); in IsFPRegister()
138 (IsSRegister() && test.IsSRegister()); in IsSameType()
Dmanaged_register_arm64_test.cc40 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
50 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
60 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
70 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
80 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
90 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
100 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
113 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
123 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
133 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
[all …]
Djni_macro_assembler_arm64.cc144 } else if (src.IsSRegister()) { in Store()
271 } else if (dest.IsSRegister()) { in Load()
347 DCHECK(arm64_reg.IsSRegister()); in MoveArguments()
420 } else if (dst.IsSRegister()) { in Move()
442 } else if (dst.IsSRegister()) { in Move()
443 CHECK(src.IsSRegister()) << src; in Move()
/art/compiler/utils/arm/
Dmanaged_register_arm.h94 CHECK(IsSRegister()); in AsSRegister()
142 constexpr bool IsSRegister() const { in IsSRegister() function
172 (IsSRegister() && test.IsSRegister()) || in IsSameType()
Dmanaged_register_arm.cc36 if (other.IsSRegister()) { in Overlaps()
83 } else if (IsSRegister()) { in Print()
Dmanaged_register_arm_test.cc34 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
42 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
51 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
60 EXPECT_TRUE(!reg.IsSRegister()); in TEST()
72 EXPECT_TRUE(reg.IsSRegister()); in TEST()
81 EXPECT_TRUE(reg.IsSRegister()); in TEST()
90 EXPECT_TRUE(reg.IsSRegister()); in TEST()
99 EXPECT_TRUE(reg.IsSRegister()); in TEST()
108 EXPECT_TRUE(reg.IsSRegister()); in TEST()
117 EXPECT_TRUE(reg.IsSRegister()); in TEST()
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Djni_macro_assembler_arm_vixl.cc53 CHECK(reg.IsSRegister()); in AsVIXLSRegister()
232 } else if (src.IsSRegister()) { in Store()
386 if (reg.IsSRegister()) { in GetSRegisterNumber()
429 DCHECK(first_src_reg.IsSRegister() || first_src_reg.IsDRegister()); in GetSpillChunkSize()
482 srcs[start].GetRegister().AsArm().IsSRegister() && in UseVstrForChunk()
483 srcs[start + 1u].GetRegister().AsArm().IsSRegister() && in UseVstrForChunk()
687 } else if (dst.IsSRegister()) { in Move()
701 CHECK(src.IsSRegister()) << src; in Move()
712 } else if (dst.IsSRegister()) { in Move()
713 if (src.IsSRegister()) { in Move()
[all …]
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc116 if (r.AsArm().IsSRegister()) { in CalculateFpCalleeSpillMask()