1 /*
2  * Copyright (C) 2014 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #include "managed_register_arm64.h"
18 
19 #include "assembler_arm64.h"
20 #include "base/globals.h"
21 #include "gtest/gtest.h"
22 
23 namespace art {
24 namespace arm64 {
25 
TEST(Arm64ManagedRegister,NoRegister)26 TEST(Arm64ManagedRegister, NoRegister) {
27   Arm64ManagedRegister reg = ManagedRegister::NoRegister().AsArm64();
28   EXPECT_TRUE(reg.IsNoRegister());
29   EXPECT_TRUE(!reg.Overlaps(reg));
30 }
31 
32 // X Register test.
TEST(Arm64ManagedRegister,XRegister)33 TEST(Arm64ManagedRegister, XRegister) {
34   Arm64ManagedRegister reg = Arm64ManagedRegister::FromXRegister(X0);
35   Arm64ManagedRegister wreg = Arm64ManagedRegister::FromWRegister(W0);
36   EXPECT_TRUE(!reg.IsNoRegister());
37   EXPECT_TRUE(reg.IsXRegister());
38   EXPECT_TRUE(!reg.IsWRegister());
39   EXPECT_TRUE(!reg.IsDRegister());
40   EXPECT_TRUE(!reg.IsSRegister());
41   EXPECT_TRUE(reg.Overlaps(wreg));
42   EXPECT_EQ(X0, reg.AsXRegister());
43 
44   reg = Arm64ManagedRegister::FromXRegister(X1);
45   wreg = Arm64ManagedRegister::FromWRegister(W1);
46   EXPECT_TRUE(!reg.IsNoRegister());
47   EXPECT_TRUE(reg.IsXRegister());
48   EXPECT_TRUE(!reg.IsWRegister());
49   EXPECT_TRUE(!reg.IsDRegister());
50   EXPECT_TRUE(!reg.IsSRegister());
51   EXPECT_TRUE(reg.Overlaps(wreg));
52   EXPECT_EQ(X1, reg.AsXRegister());
53 
54   reg = Arm64ManagedRegister::FromXRegister(X7);
55   wreg = Arm64ManagedRegister::FromWRegister(W7);
56   EXPECT_TRUE(!reg.IsNoRegister());
57   EXPECT_TRUE(reg.IsXRegister());
58   EXPECT_TRUE(!reg.IsWRegister());
59   EXPECT_TRUE(!reg.IsDRegister());
60   EXPECT_TRUE(!reg.IsSRegister());
61   EXPECT_TRUE(reg.Overlaps(wreg));
62   EXPECT_EQ(X7, reg.AsXRegister());
63 
64   reg = Arm64ManagedRegister::FromXRegister(X15);
65   wreg = Arm64ManagedRegister::FromWRegister(W15);
66   EXPECT_TRUE(!reg.IsNoRegister());
67   EXPECT_TRUE(reg.IsXRegister());
68   EXPECT_TRUE(!reg.IsWRegister());
69   EXPECT_TRUE(!reg.IsDRegister());
70   EXPECT_TRUE(!reg.IsSRegister());
71   EXPECT_TRUE(reg.Overlaps(wreg));
72   EXPECT_EQ(X15, reg.AsXRegister());
73 
74   reg = Arm64ManagedRegister::FromXRegister(X19);
75   wreg = Arm64ManagedRegister::FromWRegister(W19);
76   EXPECT_TRUE(!reg.IsNoRegister());
77   EXPECT_TRUE(reg.IsXRegister());
78   EXPECT_TRUE(!reg.IsWRegister());
79   EXPECT_TRUE(!reg.IsDRegister());
80   EXPECT_TRUE(!reg.IsSRegister());
81   EXPECT_TRUE(reg.Overlaps(wreg));
82   EXPECT_EQ(X19, reg.AsXRegister());
83 
84   reg = Arm64ManagedRegister::FromXRegister(X16);
85   wreg = Arm64ManagedRegister::FromWRegister(W16);
86   EXPECT_TRUE(!reg.IsNoRegister());
87   EXPECT_TRUE(reg.IsXRegister());
88   EXPECT_TRUE(!reg.IsWRegister());
89   EXPECT_TRUE(!reg.IsDRegister());
90   EXPECT_TRUE(!reg.IsSRegister());
91   EXPECT_TRUE(reg.Overlaps(wreg));
92   EXPECT_EQ(IP0, reg.AsXRegister());
93 
94   reg = Arm64ManagedRegister::FromXRegister(SP);
95   wreg = Arm64ManagedRegister::FromWRegister(WZR);
96   EXPECT_TRUE(!reg.IsNoRegister());
97   EXPECT_TRUE(reg.IsXRegister());
98   EXPECT_TRUE(!reg.IsWRegister());
99   EXPECT_TRUE(!reg.IsDRegister());
100   EXPECT_TRUE(!reg.IsSRegister());
101   EXPECT_TRUE(!reg.Overlaps(wreg));
102   EXPECT_EQ(SP, reg.AsXRegister());
103 }
104 
105 // W register test.
TEST(Arm64ManagedRegister,WRegister)106 TEST(Arm64ManagedRegister, WRegister) {
107   Arm64ManagedRegister reg = Arm64ManagedRegister::FromWRegister(W0);
108   Arm64ManagedRegister xreg = Arm64ManagedRegister::FromXRegister(X0);
109   EXPECT_TRUE(!reg.IsNoRegister());
110   EXPECT_TRUE(!reg.IsXRegister());
111   EXPECT_TRUE(reg.IsWRegister());
112   EXPECT_TRUE(!reg.IsDRegister());
113   EXPECT_TRUE(!reg.IsSRegister());
114   EXPECT_TRUE(reg.Overlaps(xreg));
115   EXPECT_EQ(W0, reg.AsWRegister());
116 
117   reg = Arm64ManagedRegister::FromWRegister(W5);
118   xreg = Arm64ManagedRegister::FromXRegister(X5);
119   EXPECT_TRUE(!reg.IsNoRegister());
120   EXPECT_TRUE(!reg.IsXRegister());
121   EXPECT_TRUE(reg.IsWRegister());
122   EXPECT_TRUE(!reg.IsDRegister());
123   EXPECT_TRUE(!reg.IsSRegister());
124   EXPECT_TRUE(reg.Overlaps(xreg));
125   EXPECT_EQ(W5, reg.AsWRegister());
126 
127   reg = Arm64ManagedRegister::FromWRegister(W6);
128   xreg = Arm64ManagedRegister::FromXRegister(X6);
129   EXPECT_TRUE(!reg.IsNoRegister());
130   EXPECT_TRUE(!reg.IsXRegister());
131   EXPECT_TRUE(reg.IsWRegister());
132   EXPECT_TRUE(!reg.IsDRegister());
133   EXPECT_TRUE(!reg.IsSRegister());
134   EXPECT_TRUE(reg.Overlaps(xreg));
135   EXPECT_EQ(W6, reg.AsWRegister());
136 
137   reg = Arm64ManagedRegister::FromWRegister(W18);
138   xreg = Arm64ManagedRegister::FromXRegister(X18);
139   EXPECT_TRUE(!reg.IsNoRegister());
140   EXPECT_TRUE(!reg.IsXRegister());
141   EXPECT_TRUE(reg.IsWRegister());
142   EXPECT_TRUE(!reg.IsDRegister());
143   EXPECT_TRUE(!reg.IsSRegister());
144   EXPECT_TRUE(reg.Overlaps(xreg));
145   EXPECT_EQ(W18, reg.AsWRegister());
146 
147   reg = Arm64ManagedRegister::FromWRegister(W29);
148   xreg = Arm64ManagedRegister::FromXRegister(FP);
149   EXPECT_TRUE(!reg.IsNoRegister());
150   EXPECT_TRUE(!reg.IsXRegister());
151   EXPECT_TRUE(reg.IsWRegister());
152   EXPECT_TRUE(!reg.IsDRegister());
153   EXPECT_TRUE(!reg.IsSRegister());
154   EXPECT_TRUE(reg.Overlaps(xreg));
155   EXPECT_EQ(W29, reg.AsWRegister());
156 
157   reg = Arm64ManagedRegister::FromWRegister(WZR);
158   xreg = Arm64ManagedRegister::FromXRegister(SP);
159   EXPECT_TRUE(!reg.IsNoRegister());
160   EXPECT_TRUE(!reg.IsXRegister());
161   EXPECT_TRUE(reg.IsWRegister());
162   EXPECT_TRUE(!reg.IsDRegister());
163   EXPECT_TRUE(!reg.IsSRegister());
164   EXPECT_TRUE(!reg.Overlaps(xreg));
165 }
166 
167 // D Register test.
TEST(Arm64ManagedRegister,DRegister)168 TEST(Arm64ManagedRegister, DRegister) {
169   Arm64ManagedRegister reg = Arm64ManagedRegister::FromDRegister(D0);
170   Arm64ManagedRegister sreg = Arm64ManagedRegister::FromSRegister(S0);
171   EXPECT_TRUE(!reg.IsNoRegister());
172   EXPECT_TRUE(!reg.IsXRegister());
173   EXPECT_TRUE(!reg.IsWRegister());
174   EXPECT_TRUE(reg.IsDRegister());
175   EXPECT_TRUE(!reg.IsSRegister());
176   EXPECT_TRUE(reg.Overlaps(sreg));
177   EXPECT_EQ(D0, reg.AsDRegister());
178   EXPECT_EQ(S0, reg.AsOverlappingSRegister());
179   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D0)));
180 
181   reg = Arm64ManagedRegister::FromDRegister(D1);
182   sreg = Arm64ManagedRegister::FromSRegister(S1);
183   EXPECT_TRUE(!reg.IsNoRegister());
184   EXPECT_TRUE(!reg.IsXRegister());
185   EXPECT_TRUE(!reg.IsWRegister());
186   EXPECT_TRUE(reg.IsDRegister());
187   EXPECT_TRUE(!reg.IsSRegister());
188   EXPECT_TRUE(reg.Overlaps(sreg));
189   EXPECT_EQ(D1, reg.AsDRegister());
190   EXPECT_EQ(S1, reg.AsOverlappingSRegister());
191   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D1)));
192 
193   reg = Arm64ManagedRegister::FromDRegister(D20);
194   sreg = Arm64ManagedRegister::FromSRegister(S20);
195   EXPECT_TRUE(!reg.IsNoRegister());
196   EXPECT_TRUE(!reg.IsXRegister());
197   EXPECT_TRUE(!reg.IsWRegister());
198   EXPECT_TRUE(reg.IsDRegister());
199   EXPECT_TRUE(!reg.IsSRegister());
200   EXPECT_TRUE(reg.Overlaps(sreg));
201   EXPECT_EQ(D20, reg.AsDRegister());
202   EXPECT_EQ(S20, reg.AsOverlappingSRegister());
203   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D20)));
204 
205   reg = Arm64ManagedRegister::FromDRegister(D31);
206   sreg = Arm64ManagedRegister::FromSRegister(S31);
207   EXPECT_TRUE(!reg.IsNoRegister());
208   EXPECT_TRUE(!reg.IsXRegister());
209   EXPECT_TRUE(!reg.IsWRegister());
210   EXPECT_TRUE(reg.IsDRegister());
211   EXPECT_TRUE(!reg.IsSRegister());
212   EXPECT_TRUE(reg.Overlaps(sreg));
213   EXPECT_EQ(D31, reg.AsDRegister());
214   EXPECT_EQ(S31, reg.AsOverlappingSRegister());
215   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromDRegister(D31)));
216 }
217 
218 // S Register test.
TEST(Arm64ManagedRegister,SRegister)219 TEST(Arm64ManagedRegister, SRegister) {
220   Arm64ManagedRegister reg = Arm64ManagedRegister::FromSRegister(S0);
221   Arm64ManagedRegister dreg = Arm64ManagedRegister::FromDRegister(D0);
222   EXPECT_TRUE(!reg.IsNoRegister());
223   EXPECT_TRUE(!reg.IsXRegister());
224   EXPECT_TRUE(!reg.IsWRegister());
225   EXPECT_TRUE(reg.IsSRegister());
226   EXPECT_TRUE(!reg.IsDRegister());
227   EXPECT_TRUE(reg.Overlaps(dreg));
228   EXPECT_EQ(S0, reg.AsSRegister());
229   EXPECT_EQ(D0, reg.AsOverlappingDRegister());
230   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S0)));
231 
232   reg = Arm64ManagedRegister::FromSRegister(S5);
233   dreg = Arm64ManagedRegister::FromDRegister(D5);
234   EXPECT_TRUE(!reg.IsNoRegister());
235   EXPECT_TRUE(!reg.IsXRegister());
236   EXPECT_TRUE(!reg.IsWRegister());
237   EXPECT_TRUE(reg.IsSRegister());
238   EXPECT_TRUE(!reg.IsDRegister());
239   EXPECT_TRUE(reg.Overlaps(dreg));
240   EXPECT_EQ(S5, reg.AsSRegister());
241   EXPECT_EQ(D5, reg.AsOverlappingDRegister());
242   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S5)));
243 
244   reg = Arm64ManagedRegister::FromSRegister(S7);
245   dreg = Arm64ManagedRegister::FromDRegister(D7);
246   EXPECT_TRUE(!reg.IsNoRegister());
247   EXPECT_TRUE(!reg.IsXRegister());
248   EXPECT_TRUE(!reg.IsWRegister());
249   EXPECT_TRUE(reg.IsSRegister());
250   EXPECT_TRUE(!reg.IsDRegister());
251   EXPECT_TRUE(reg.Overlaps(dreg));
252   EXPECT_EQ(S7, reg.AsSRegister());
253   EXPECT_EQ(D7, reg.AsOverlappingDRegister());
254   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S7)));
255 
256   reg = Arm64ManagedRegister::FromSRegister(S31);
257   dreg = Arm64ManagedRegister::FromDRegister(D31);
258   EXPECT_TRUE(!reg.IsNoRegister());
259   EXPECT_TRUE(!reg.IsXRegister());
260   EXPECT_TRUE(!reg.IsWRegister());
261   EXPECT_TRUE(reg.IsSRegister());
262   EXPECT_TRUE(!reg.IsDRegister());
263   EXPECT_TRUE(reg.Overlaps(dreg));
264   EXPECT_EQ(S31, reg.AsSRegister());
265   EXPECT_EQ(D31, reg.AsOverlappingDRegister());
266   EXPECT_TRUE(reg.Equals(Arm64ManagedRegister::FromSRegister(S31)));
267 }
268 
TEST(Arm64ManagedRegister,Equals)269 TEST(Arm64ManagedRegister, Equals) {
270   ManagedRegister no_reg = ManagedRegister::NoRegister();
271   EXPECT_TRUE(no_reg.Equals(Arm64ManagedRegister::NoRegister()));
272   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromXRegister(X0)));
273   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromXRegister(X1)));
274   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromWRegister(W0)));
275   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromWRegister(W1)));
276   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromDRegister(D0)));
277   EXPECT_TRUE(!no_reg.Equals(Arm64ManagedRegister::FromSRegister(S0)));
278 
279   Arm64ManagedRegister reg_X0 = Arm64ManagedRegister::FromXRegister(X0);
280   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::NoRegister()));
281   EXPECT_TRUE(reg_X0.Equals(Arm64ManagedRegister::FromXRegister(X0)));
282   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromXRegister(X1)));
283   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromWRegister(W0)));
284   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
285   EXPECT_TRUE(!reg_X0.Equals(Arm64ManagedRegister::FromDRegister(D0)));
286 
287   Arm64ManagedRegister reg_X1 = Arm64ManagedRegister::FromXRegister(X1);
288   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::NoRegister()));
289   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromXRegister(X0)));
290   EXPECT_TRUE(reg_X1.Equals(Arm64ManagedRegister::FromXRegister(X1)));
291   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromWRegister(W1)));
292   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromDRegister(D0)));
293   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S0)));
294   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromDRegister(D1)));
295   EXPECT_TRUE(!reg_X1.Equals(Arm64ManagedRegister::FromSRegister(S1)));
296 
297   Arm64ManagedRegister reg_SP = Arm64ManagedRegister::FromXRegister(SP);
298   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::NoRegister()));
299   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromXRegister(XZR)));
300   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromSRegister(S0)));
301   EXPECT_TRUE(!reg_SP.Equals(Arm64ManagedRegister::FromDRegister(D0)));
302 
303   Arm64ManagedRegister reg_W8 = Arm64ManagedRegister::FromWRegister(W8);
304   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::NoRegister()));
305   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromXRegister(X0)));
306   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromXRegister(X8)));
307   EXPECT_TRUE(reg_W8.Equals(Arm64ManagedRegister::FromWRegister(W8)));
308   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromDRegister(D0)));
309   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromSRegister(S0)));
310   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromDRegister(D1)));
311   EXPECT_TRUE(!reg_W8.Equals(Arm64ManagedRegister::FromSRegister(S1)));
312 
313   Arm64ManagedRegister reg_W12 = Arm64ManagedRegister::FromWRegister(W12);
314   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::NoRegister()));
315   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromXRegister(X0)));
316   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromXRegister(X8)));
317   EXPECT_TRUE(reg_W12.Equals(Arm64ManagedRegister::FromWRegister(W12)));
318   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromDRegister(D0)));
319   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromSRegister(S0)));
320   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromDRegister(D1)));
321   EXPECT_TRUE(!reg_W12.Equals(Arm64ManagedRegister::FromSRegister(S1)));
322 
323   Arm64ManagedRegister reg_S0 = Arm64ManagedRegister::FromSRegister(S0);
324   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::NoRegister()));
325   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromXRegister(X0)));
326   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromXRegister(X1)));
327   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromWRegister(W0)));
328   EXPECT_TRUE(reg_S0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
329   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromSRegister(S1)));
330   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromDRegister(D0)));
331   EXPECT_TRUE(!reg_S0.Equals(Arm64ManagedRegister::FromDRegister(D1)));
332 
333   Arm64ManagedRegister reg_S1 = Arm64ManagedRegister::FromSRegister(S1);
334   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::NoRegister()));
335   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromXRegister(X0)));
336   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromXRegister(X1)));
337   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromWRegister(W0)));
338   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromSRegister(S0)));
339   EXPECT_TRUE(reg_S1.Equals(Arm64ManagedRegister::FromSRegister(S1)));
340   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromDRegister(D0)));
341   EXPECT_TRUE(!reg_S1.Equals(Arm64ManagedRegister::FromDRegister(D1)));
342 
343   Arm64ManagedRegister reg_S31 = Arm64ManagedRegister::FromSRegister(S31);
344   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::NoRegister()));
345   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromXRegister(X0)));
346   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromXRegister(X1)));
347   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromWRegister(W0)));
348   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromSRegister(S0)));
349   EXPECT_TRUE(reg_S31.Equals(Arm64ManagedRegister::FromSRegister(S31)));
350   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromDRegister(D0)));
351   EXPECT_TRUE(!reg_S31.Equals(Arm64ManagedRegister::FromDRegister(D1)));
352 
353   Arm64ManagedRegister reg_D0 = Arm64ManagedRegister::FromDRegister(D0);
354   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::NoRegister()));
355   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromXRegister(X0)));
356   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromWRegister(W1)));
357   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
358   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S0)));
359   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromSRegister(S31)));
360   EXPECT_TRUE(reg_D0.Equals(Arm64ManagedRegister::FromDRegister(D0)));
361   EXPECT_TRUE(!reg_D0.Equals(Arm64ManagedRegister::FromDRegister(D1)));
362 
363   Arm64ManagedRegister reg_D15 = Arm64ManagedRegister::FromDRegister(D15);
364   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::NoRegister()));
365   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromXRegister(X0)));
366   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromXRegister(X1)));
367   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromWRegister(W0)));
368   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromSRegister(S0)));
369   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromSRegister(S31)));
370   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D0)));
371   EXPECT_TRUE(!reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D1)));
372   EXPECT_TRUE(reg_D15.Equals(Arm64ManagedRegister::FromDRegister(D15)));
373 }
374 
TEST(Arm64ManagedRegister,Overlaps)375 TEST(Arm64ManagedRegister, Overlaps) {
376   Arm64ManagedRegister reg = Arm64ManagedRegister::FromXRegister(X0);
377   Arm64ManagedRegister reg_o = Arm64ManagedRegister::FromWRegister(W0);
378   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X0)));
379   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
380   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
381   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W0)));
382   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
383   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
384   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
385   EXPECT_EQ(X0, reg_o.AsOverlappingXRegister());
386   EXPECT_EQ(W0, reg.AsOverlappingWRegister());
387   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
388   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
389   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
390   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
391   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
392   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
393   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
394   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
395   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
396   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
397 
398   reg = Arm64ManagedRegister::FromXRegister(X10);
399   reg_o = Arm64ManagedRegister::FromWRegister(W10);
400   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X10)));
401   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
402   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
403   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W10)));
404   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
405   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
406   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
407   EXPECT_EQ(X10, reg_o.AsOverlappingXRegister());
408   EXPECT_EQ(W10, reg.AsOverlappingWRegister());
409   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
410   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
411   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
412   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
413   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
414   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
415   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
416   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
417   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
418   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
419 
420   reg = Arm64ManagedRegister::FromXRegister(IP1);
421   reg_o = Arm64ManagedRegister::FromWRegister(W17);
422   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X17)));
423   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
424   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
425   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W17)));
426   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
427   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
428   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
429   EXPECT_EQ(X17, reg_o.AsOverlappingXRegister());
430   EXPECT_EQ(W17, reg.AsOverlappingWRegister());
431   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
432   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
433   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
434   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
435   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
436   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
437   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
438   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
439   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
440   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
441 
442   reg = Arm64ManagedRegister::FromXRegister(XZR);
443   reg_o = Arm64ManagedRegister::FromWRegister(WZR);
444   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
445   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(SP)));
446   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
447   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
448   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W19)));
449   EXPECT_NE(SP, reg_o.AsOverlappingXRegister());
450   EXPECT_EQ(XZR, reg_o.AsOverlappingXRegister());
451   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
452   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
453   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
454   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
455   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
456   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
457   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
458   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
459   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
460   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
461 
462   reg = Arm64ManagedRegister::FromXRegister(SP);
463   reg_o = Arm64ManagedRegister::FromWRegister(WZR);
464   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
465   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
466   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
467   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
468   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
469   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
470   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
471   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
472   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
473   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
474   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
475   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
476   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
477   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
478   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
479 
480   reg = Arm64ManagedRegister::FromWRegister(W1);
481   reg_o = Arm64ManagedRegister::FromXRegister(X1);
482   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
483   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
484   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
485   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
486   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
487   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
488   EXPECT_EQ(W1, reg_o.AsOverlappingWRegister());
489   EXPECT_EQ(X1, reg.AsOverlappingXRegister());
490   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
491   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
492   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
493   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
494   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
495   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
496   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
497   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
498   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
499   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
500 
501   reg = Arm64ManagedRegister::FromWRegister(W21);
502   reg_o = Arm64ManagedRegister::FromXRegister(X21);
503   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromWRegister(W21)));
504   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromXRegister(X21)));
505   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
506   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
507   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
508   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
509   EXPECT_EQ(W21, reg_o.AsOverlappingWRegister());
510   EXPECT_EQ(X21, reg.AsOverlappingXRegister());
511   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
512   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
513   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
514   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
515   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
516   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
517   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
518   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
519   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
520   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
521 
522 
523   reg = Arm64ManagedRegister::FromSRegister(S1);
524   reg_o = Arm64ManagedRegister::FromDRegister(D1);
525   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X30)));
526   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
527   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
528   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
529   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
530   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
531   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
532   EXPECT_EQ(S1, reg_o.AsOverlappingSRegister());
533   EXPECT_EQ(D1, reg.AsOverlappingDRegister());
534   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
535   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S1)));
536   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
537   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
538   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S30)));
539   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
540   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D0)));
541   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D1)));
542   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2)));
543   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D7)));
544   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
545 
546   reg = Arm64ManagedRegister::FromSRegister(S15);
547   reg_o = Arm64ManagedRegister::FromDRegister(D15);
548   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X30)));
549   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
550   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
551   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
552   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
553   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
554   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
555   EXPECT_EQ(S15, reg_o.AsOverlappingSRegister());
556   EXPECT_EQ(D15, reg.AsOverlappingDRegister());
557   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
558   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
559   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
560   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S17)));
561   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S16)));
562   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
563   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D16)));
564   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
565   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2)));
566   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17)));
567   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20)));
568 
569   reg = Arm64ManagedRegister::FromDRegister(D15);
570   reg_o = Arm64ManagedRegister::FromSRegister(S15);
571   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X30)));
572   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X1)));
573   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromXRegister(X15)));
574   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(WZR)));
575   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W1)));
576   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W12)));
577   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromWRegister(W30)));
578   EXPECT_EQ(S15, reg.AsOverlappingSRegister());
579   EXPECT_EQ(D15, reg_o.AsOverlappingDRegister());
580   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S0)));
581   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromSRegister(S15)));
582   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S2)));
583   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S17)));
584   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S16)));
585   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromSRegister(S31)));
586   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D16)));
587   EXPECT_TRUE(reg.Overlaps(Arm64ManagedRegister::FromDRegister(D15)));
588   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D2)));
589   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D17)));
590   EXPECT_TRUE(!reg.Overlaps(Arm64ManagedRegister::FromDRegister(D20)));
591 }
592 
TEST(Arm64ManagedRegister,VixlRegisters)593 TEST(Arm64ManagedRegister, VixlRegisters) {
594   // X Registers.
595   EXPECT_TRUE(vixl::aarch64::x0.Is(Arm64Assembler::reg_x(X0)));
596   EXPECT_TRUE(vixl::aarch64::x1.Is(Arm64Assembler::reg_x(X1)));
597   EXPECT_TRUE(vixl::aarch64::x2.Is(Arm64Assembler::reg_x(X2)));
598   EXPECT_TRUE(vixl::aarch64::x3.Is(Arm64Assembler::reg_x(X3)));
599   EXPECT_TRUE(vixl::aarch64::x4.Is(Arm64Assembler::reg_x(X4)));
600   EXPECT_TRUE(vixl::aarch64::x5.Is(Arm64Assembler::reg_x(X5)));
601   EXPECT_TRUE(vixl::aarch64::x6.Is(Arm64Assembler::reg_x(X6)));
602   EXPECT_TRUE(vixl::aarch64::x7.Is(Arm64Assembler::reg_x(X7)));
603   EXPECT_TRUE(vixl::aarch64::x8.Is(Arm64Assembler::reg_x(X8)));
604   EXPECT_TRUE(vixl::aarch64::x9.Is(Arm64Assembler::reg_x(X9)));
605   EXPECT_TRUE(vixl::aarch64::x10.Is(Arm64Assembler::reg_x(X10)));
606   EXPECT_TRUE(vixl::aarch64::x11.Is(Arm64Assembler::reg_x(X11)));
607   EXPECT_TRUE(vixl::aarch64::x12.Is(Arm64Assembler::reg_x(X12)));
608   EXPECT_TRUE(vixl::aarch64::x13.Is(Arm64Assembler::reg_x(X13)));
609   EXPECT_TRUE(vixl::aarch64::x14.Is(Arm64Assembler::reg_x(X14)));
610   EXPECT_TRUE(vixl::aarch64::x15.Is(Arm64Assembler::reg_x(X15)));
611   EXPECT_TRUE(vixl::aarch64::x16.Is(Arm64Assembler::reg_x(X16)));
612   EXPECT_TRUE(vixl::aarch64::x17.Is(Arm64Assembler::reg_x(X17)));
613   EXPECT_TRUE(vixl::aarch64::x18.Is(Arm64Assembler::reg_x(X18)));
614   EXPECT_TRUE(vixl::aarch64::x19.Is(Arm64Assembler::reg_x(X19)));
615   EXPECT_TRUE(vixl::aarch64::x20.Is(Arm64Assembler::reg_x(X20)));
616   EXPECT_TRUE(vixl::aarch64::x21.Is(Arm64Assembler::reg_x(X21)));
617   EXPECT_TRUE(vixl::aarch64::x22.Is(Arm64Assembler::reg_x(X22)));
618   EXPECT_TRUE(vixl::aarch64::x23.Is(Arm64Assembler::reg_x(X23)));
619   EXPECT_TRUE(vixl::aarch64::x24.Is(Arm64Assembler::reg_x(X24)));
620   EXPECT_TRUE(vixl::aarch64::x25.Is(Arm64Assembler::reg_x(X25)));
621   EXPECT_TRUE(vixl::aarch64::x26.Is(Arm64Assembler::reg_x(X26)));
622   EXPECT_TRUE(vixl::aarch64::x27.Is(Arm64Assembler::reg_x(X27)));
623   EXPECT_TRUE(vixl::aarch64::x28.Is(Arm64Assembler::reg_x(X28)));
624   EXPECT_TRUE(vixl::aarch64::x29.Is(Arm64Assembler::reg_x(X29)));
625   EXPECT_TRUE(vixl::aarch64::x30.Is(Arm64Assembler::reg_x(X30)));
626 
627   EXPECT_TRUE(vixl::aarch64::x19.Is(Arm64Assembler::reg_x(TR)));
628   EXPECT_TRUE(vixl::aarch64::ip0.Is(Arm64Assembler::reg_x(IP0)));
629   EXPECT_TRUE(vixl::aarch64::ip1.Is(Arm64Assembler::reg_x(IP1)));
630   EXPECT_TRUE(vixl::aarch64::x29.Is(Arm64Assembler::reg_x(FP)));
631   EXPECT_TRUE(vixl::aarch64::lr.Is(Arm64Assembler::reg_x(LR)));
632   EXPECT_TRUE(vixl::aarch64::sp.Is(Arm64Assembler::reg_x(SP)));
633   EXPECT_TRUE(vixl::aarch64::xzr.Is(Arm64Assembler::reg_x(XZR)));
634 
635   // W Registers.
636   EXPECT_TRUE(vixl::aarch64::w0.Is(Arm64Assembler::reg_w(W0)));
637   EXPECT_TRUE(vixl::aarch64::w1.Is(Arm64Assembler::reg_w(W1)));
638   EXPECT_TRUE(vixl::aarch64::w2.Is(Arm64Assembler::reg_w(W2)));
639   EXPECT_TRUE(vixl::aarch64::w3.Is(Arm64Assembler::reg_w(W3)));
640   EXPECT_TRUE(vixl::aarch64::w4.Is(Arm64Assembler::reg_w(W4)));
641   EXPECT_TRUE(vixl::aarch64::w5.Is(Arm64Assembler::reg_w(W5)));
642   EXPECT_TRUE(vixl::aarch64::w6.Is(Arm64Assembler::reg_w(W6)));
643   EXPECT_TRUE(vixl::aarch64::w7.Is(Arm64Assembler::reg_w(W7)));
644   EXPECT_TRUE(vixl::aarch64::w8.Is(Arm64Assembler::reg_w(W8)));
645   EXPECT_TRUE(vixl::aarch64::w9.Is(Arm64Assembler::reg_w(W9)));
646   EXPECT_TRUE(vixl::aarch64::w10.Is(Arm64Assembler::reg_w(W10)));
647   EXPECT_TRUE(vixl::aarch64::w11.Is(Arm64Assembler::reg_w(W11)));
648   EXPECT_TRUE(vixl::aarch64::w12.Is(Arm64Assembler::reg_w(W12)));
649   EXPECT_TRUE(vixl::aarch64::w13.Is(Arm64Assembler::reg_w(W13)));
650   EXPECT_TRUE(vixl::aarch64::w14.Is(Arm64Assembler::reg_w(W14)));
651   EXPECT_TRUE(vixl::aarch64::w15.Is(Arm64Assembler::reg_w(W15)));
652   EXPECT_TRUE(vixl::aarch64::w16.Is(Arm64Assembler::reg_w(W16)));
653   EXPECT_TRUE(vixl::aarch64::w17.Is(Arm64Assembler::reg_w(W17)));
654   EXPECT_TRUE(vixl::aarch64::w18.Is(Arm64Assembler::reg_w(W18)));
655   EXPECT_TRUE(vixl::aarch64::w19.Is(Arm64Assembler::reg_w(W19)));
656   EXPECT_TRUE(vixl::aarch64::w20.Is(Arm64Assembler::reg_w(W20)));
657   EXPECT_TRUE(vixl::aarch64::w21.Is(Arm64Assembler::reg_w(W21)));
658   EXPECT_TRUE(vixl::aarch64::w22.Is(Arm64Assembler::reg_w(W22)));
659   EXPECT_TRUE(vixl::aarch64::w23.Is(Arm64Assembler::reg_w(W23)));
660   EXPECT_TRUE(vixl::aarch64::w24.Is(Arm64Assembler::reg_w(W24)));
661   EXPECT_TRUE(vixl::aarch64::w25.Is(Arm64Assembler::reg_w(W25)));
662   EXPECT_TRUE(vixl::aarch64::w26.Is(Arm64Assembler::reg_w(W26)));
663   EXPECT_TRUE(vixl::aarch64::w27.Is(Arm64Assembler::reg_w(W27)));
664   EXPECT_TRUE(vixl::aarch64::w28.Is(Arm64Assembler::reg_w(W28)));
665   EXPECT_TRUE(vixl::aarch64::w29.Is(Arm64Assembler::reg_w(W29)));
666   EXPECT_TRUE(vixl::aarch64::w30.Is(Arm64Assembler::reg_w(W30)));
667   EXPECT_TRUE(vixl::aarch64::w31.Is(Arm64Assembler::reg_w(WZR)));
668   EXPECT_TRUE(vixl::aarch64::wzr.Is(Arm64Assembler::reg_w(WZR)));
669   EXPECT_TRUE(vixl::aarch64::wsp.Is(Arm64Assembler::reg_w(WSP)));
670 
671   // D Registers.
672   EXPECT_TRUE(vixl::aarch64::d0.Is(Arm64Assembler::reg_d(D0)));
673   EXPECT_TRUE(vixl::aarch64::d1.Is(Arm64Assembler::reg_d(D1)));
674   EXPECT_TRUE(vixl::aarch64::d2.Is(Arm64Assembler::reg_d(D2)));
675   EXPECT_TRUE(vixl::aarch64::d3.Is(Arm64Assembler::reg_d(D3)));
676   EXPECT_TRUE(vixl::aarch64::d4.Is(Arm64Assembler::reg_d(D4)));
677   EXPECT_TRUE(vixl::aarch64::d5.Is(Arm64Assembler::reg_d(D5)));
678   EXPECT_TRUE(vixl::aarch64::d6.Is(Arm64Assembler::reg_d(D6)));
679   EXPECT_TRUE(vixl::aarch64::d7.Is(Arm64Assembler::reg_d(D7)));
680   EXPECT_TRUE(vixl::aarch64::d8.Is(Arm64Assembler::reg_d(D8)));
681   EXPECT_TRUE(vixl::aarch64::d9.Is(Arm64Assembler::reg_d(D9)));
682   EXPECT_TRUE(vixl::aarch64::d10.Is(Arm64Assembler::reg_d(D10)));
683   EXPECT_TRUE(vixl::aarch64::d11.Is(Arm64Assembler::reg_d(D11)));
684   EXPECT_TRUE(vixl::aarch64::d12.Is(Arm64Assembler::reg_d(D12)));
685   EXPECT_TRUE(vixl::aarch64::d13.Is(Arm64Assembler::reg_d(D13)));
686   EXPECT_TRUE(vixl::aarch64::d14.Is(Arm64Assembler::reg_d(D14)));
687   EXPECT_TRUE(vixl::aarch64::d15.Is(Arm64Assembler::reg_d(D15)));
688   EXPECT_TRUE(vixl::aarch64::d16.Is(Arm64Assembler::reg_d(D16)));
689   EXPECT_TRUE(vixl::aarch64::d17.Is(Arm64Assembler::reg_d(D17)));
690   EXPECT_TRUE(vixl::aarch64::d18.Is(Arm64Assembler::reg_d(D18)));
691   EXPECT_TRUE(vixl::aarch64::d19.Is(Arm64Assembler::reg_d(D19)));
692   EXPECT_TRUE(vixl::aarch64::d20.Is(Arm64Assembler::reg_d(D20)));
693   EXPECT_TRUE(vixl::aarch64::d21.Is(Arm64Assembler::reg_d(D21)));
694   EXPECT_TRUE(vixl::aarch64::d22.Is(Arm64Assembler::reg_d(D22)));
695   EXPECT_TRUE(vixl::aarch64::d23.Is(Arm64Assembler::reg_d(D23)));
696   EXPECT_TRUE(vixl::aarch64::d24.Is(Arm64Assembler::reg_d(D24)));
697   EXPECT_TRUE(vixl::aarch64::d25.Is(Arm64Assembler::reg_d(D25)));
698   EXPECT_TRUE(vixl::aarch64::d26.Is(Arm64Assembler::reg_d(D26)));
699   EXPECT_TRUE(vixl::aarch64::d27.Is(Arm64Assembler::reg_d(D27)));
700   EXPECT_TRUE(vixl::aarch64::d28.Is(Arm64Assembler::reg_d(D28)));
701   EXPECT_TRUE(vixl::aarch64::d29.Is(Arm64Assembler::reg_d(D29)));
702   EXPECT_TRUE(vixl::aarch64::d30.Is(Arm64Assembler::reg_d(D30)));
703   EXPECT_TRUE(vixl::aarch64::d31.Is(Arm64Assembler::reg_d(D31)));
704 
705   // S Registers.
706   EXPECT_TRUE(vixl::aarch64::s0.Is(Arm64Assembler::reg_s(S0)));
707   EXPECT_TRUE(vixl::aarch64::s1.Is(Arm64Assembler::reg_s(S1)));
708   EXPECT_TRUE(vixl::aarch64::s2.Is(Arm64Assembler::reg_s(S2)));
709   EXPECT_TRUE(vixl::aarch64::s3.Is(Arm64Assembler::reg_s(S3)));
710   EXPECT_TRUE(vixl::aarch64::s4.Is(Arm64Assembler::reg_s(S4)));
711   EXPECT_TRUE(vixl::aarch64::s5.Is(Arm64Assembler::reg_s(S5)));
712   EXPECT_TRUE(vixl::aarch64::s6.Is(Arm64Assembler::reg_s(S6)));
713   EXPECT_TRUE(vixl::aarch64::s7.Is(Arm64Assembler::reg_s(S7)));
714   EXPECT_TRUE(vixl::aarch64::s8.Is(Arm64Assembler::reg_s(S8)));
715   EXPECT_TRUE(vixl::aarch64::s9.Is(Arm64Assembler::reg_s(S9)));
716   EXPECT_TRUE(vixl::aarch64::s10.Is(Arm64Assembler::reg_s(S10)));
717   EXPECT_TRUE(vixl::aarch64::s11.Is(Arm64Assembler::reg_s(S11)));
718   EXPECT_TRUE(vixl::aarch64::s12.Is(Arm64Assembler::reg_s(S12)));
719   EXPECT_TRUE(vixl::aarch64::s13.Is(Arm64Assembler::reg_s(S13)));
720   EXPECT_TRUE(vixl::aarch64::s14.Is(Arm64Assembler::reg_s(S14)));
721   EXPECT_TRUE(vixl::aarch64::s15.Is(Arm64Assembler::reg_s(S15)));
722   EXPECT_TRUE(vixl::aarch64::s16.Is(Arm64Assembler::reg_s(S16)));
723   EXPECT_TRUE(vixl::aarch64::s17.Is(Arm64Assembler::reg_s(S17)));
724   EXPECT_TRUE(vixl::aarch64::s18.Is(Arm64Assembler::reg_s(S18)));
725   EXPECT_TRUE(vixl::aarch64::s19.Is(Arm64Assembler::reg_s(S19)));
726   EXPECT_TRUE(vixl::aarch64::s20.Is(Arm64Assembler::reg_s(S20)));
727   EXPECT_TRUE(vixl::aarch64::s21.Is(Arm64Assembler::reg_s(S21)));
728   EXPECT_TRUE(vixl::aarch64::s22.Is(Arm64Assembler::reg_s(S22)));
729   EXPECT_TRUE(vixl::aarch64::s23.Is(Arm64Assembler::reg_s(S23)));
730   EXPECT_TRUE(vixl::aarch64::s24.Is(Arm64Assembler::reg_s(S24)));
731   EXPECT_TRUE(vixl::aarch64::s25.Is(Arm64Assembler::reg_s(S25)));
732   EXPECT_TRUE(vixl::aarch64::s26.Is(Arm64Assembler::reg_s(S26)));
733   EXPECT_TRUE(vixl::aarch64::s27.Is(Arm64Assembler::reg_s(S27)));
734   EXPECT_TRUE(vixl::aarch64::s28.Is(Arm64Assembler::reg_s(S28)));
735   EXPECT_TRUE(vixl::aarch64::s29.Is(Arm64Assembler::reg_s(S29)));
736   EXPECT_TRUE(vixl::aarch64::s30.Is(Arm64Assembler::reg_s(S30)));
737   EXPECT_TRUE(vixl::aarch64::s31.Is(Arm64Assembler::reg_s(S31)));
738 }
739 
740 }  // namespace arm64
741 }  // namespace art
742