1 /*
2  * Copyright (C) 2015 The Android Open Source Project
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #include <memory>
18 #include <vector>
19 
20 #include "arch/instruction_set.h"
21 #include "base/arena_allocator.h"
22 #include "base/enums.h"
23 #include "base/malloc_arena_pool.h"
24 #include "cfi_test.h"
25 #include "gtest/gtest.h"
26 #include "jni/quick/calling_convention.h"
27 #include "read_barrier_config.h"
28 #include "utils/assembler.h"
29 #include "utils/jni_macro_assembler.h"
30 
31 #include "jni/jni_cfi_test_expected.inc"
32 
33 namespace art {
34 
35 // Run the tests only on host.
36 #ifndef ART_TARGET_ANDROID
37 
38 class JNICFITest : public CFITest {
39  public:
40   // Enable this flag to generate the expected outputs.
41   static constexpr bool kGenerateExpected = false;
42 
TestImpl(InstructionSet isa,const char * isa_str,const std::vector<uint8_t> & expected_asm,const std::vector<uint8_t> & expected_cfi)43   void TestImpl(InstructionSet isa,
44                 const char* isa_str,
45                 const std::vector<uint8_t>& expected_asm,
46                 const std::vector<uint8_t>& expected_cfi) {
47     if (Is64BitInstructionSet(isa)) {
48       TestImplSized<PointerSize::k64>(isa, isa_str, expected_asm, expected_cfi);
49     } else {
50       TestImplSized<PointerSize::k32>(isa, isa_str, expected_asm, expected_cfi);
51     }
52   }
53 
54  private:
55   template <PointerSize kPointerSize>
TestImplSized(InstructionSet isa,const char * isa_str,const std::vector<uint8_t> & expected_asm,const std::vector<uint8_t> & expected_cfi)56   void TestImplSized(InstructionSet isa,
57                      const char* isa_str,
58                      const std::vector<uint8_t>& expected_asm,
59                      const std::vector<uint8_t>& expected_cfi) {
60     // Description of simple method.
61     const bool is_static = true;
62     const bool is_synchronized = false;
63     const char* shorty = "IIFII";
64 
65     MallocArenaPool pool;
66     ArenaAllocator allocator(&pool);
67 
68     std::unique_ptr<JniCallingConvention> jni_conv(
69         JniCallingConvention::Create(&allocator,
70                                      is_static,
71                                      is_synchronized,
72                                      /*is_critical_native*/false,
73                                      shorty,
74                                      isa));
75     std::unique_ptr<ManagedRuntimeCallingConvention> mr_conv(
76         ManagedRuntimeCallingConvention::Create(
77             &allocator, is_static, is_synchronized, shorty, isa));
78     const int frame_size(jni_conv->FrameSize());
79     ArrayRef<const ManagedRegister> callee_save_regs = jni_conv->CalleeSaveRegisters();
80 
81     // Assemble the method.
82     std::unique_ptr<JNIMacroAssembler<kPointerSize>> jni_asm(
83         JNIMacroAssembler<kPointerSize>::Create(&allocator, isa));
84     jni_asm->cfi().SetEnabled(true);
85     jni_asm->BuildFrame(frame_size, mr_conv->MethodRegister(), callee_save_regs);
86     // Spill arguments.
87     mr_conv->ResetIterator(FrameOffset(frame_size));
88     for (; mr_conv->HasNext(); mr_conv->Next()) {
89       if (mr_conv->IsCurrentParamInRegister()) {
90         size_t size = mr_conv->IsCurrentParamALongOrDouble() ? 8u : 4u;
91         jni_asm->Store(mr_conv->CurrentParamStackOffset(), mr_conv->CurrentParamRegister(), size);
92       }
93     }
94     jni_asm->IncreaseFrameSize(32);
95     jni_asm->DecreaseFrameSize(32);
96     jni_asm->RemoveFrame(frame_size, callee_save_regs, /* may_suspend= */ true);
97     jni_asm->FinalizeCode();
98     std::vector<uint8_t> actual_asm(jni_asm->CodeSize());
99     MemoryRegion code(&actual_asm[0], actual_asm.size());
100     jni_asm->FinalizeInstructions(code);
101     ASSERT_EQ(jni_asm->cfi().GetCurrentCFAOffset(), frame_size);
102     const std::vector<uint8_t>& actual_cfi = *(jni_asm->cfi().data());
103 
104     if (kGenerateExpected) {
105       GenerateExpected(stdout,
106                        isa,
107                        isa_str,
108                        ArrayRef<const uint8_t>(actual_asm),
109                        ArrayRef<const uint8_t>(actual_cfi));
110     } else {
111       EXPECT_EQ(expected_asm, actual_asm);
112       EXPECT_EQ(expected_cfi, actual_cfi);
113     }
114   }
115 };
116 
117 #define TEST_ISA(isa)                                                 \
118   TEST_F(JNICFITest, isa) {                                           \
119     std::vector<uint8_t> expected_asm(expected_asm_##isa,             \
120         expected_asm_##isa + arraysize(expected_asm_##isa));          \
121     std::vector<uint8_t> expected_cfi(expected_cfi_##isa,             \
122         expected_cfi_##isa + arraysize(expected_cfi_##isa));          \
123     TestImpl(InstructionSet::isa, #isa, expected_asm, expected_cfi);  \
124   }
125 
126 #ifdef ART_ENABLE_CODEGEN_arm
127 // Run the tests for ARM only with Baker read barriers, as the
128 // expected generated code contains a Marking Register refresh
129 // instruction.
130 #if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
131 TEST_ISA(kThumb2)
132 #endif
133 #endif
134 
135 #ifdef ART_ENABLE_CODEGEN_arm64
136 // Run the tests for ARM64 only with Baker read barriers, as the
137 // expected generated code contains a Marking Register refresh
138 // instruction.
139 #if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
140 TEST_ISA(kArm64)
141 #endif
142 #endif
143 
144 #ifdef ART_ENABLE_CODEGEN_x86
145 TEST_ISA(kX86)
146 #endif
147 
148 #ifdef ART_ENABLE_CODEGEN_x86_64
149 TEST_ISA(kX86_64)
150 #endif
151 
152 #endif  // ART_TARGET_ANDROID
153 
154 }  // namespace art
155