1 /****************************************************************************
2  ****************************************************************************
3  ***
4  ***   This header was automatically generated from a Linux kernel header
5  ***   of the same name, to make information necessary for userspace to
6  ***   call into the kernel available to libc.  It contains only constants,
7  ***   structures, and macros generated from the original header, and thus,
8  ***   contains no copyrightable information.
9  ***
10  ***   To edit the content of this header, modify the corresponding
11  ***   source file (e.g. under external/kernel-headers/original/) then
12  ***   run bionic/libc/kernel/tools/update_all.py
13  ***
14  ***   Any manual change here will be lost the next time this script will
15  ***   be run. You've been warned!
16  ***
17  ****************************************************************************
18  ****************************************************************************/
19 #ifndef __UAPI_MSMB_ISP__
20 #define __UAPI_MSMB_ISP__
21 #include <linux/videodev2.h>
22 #define MAX_PLANES_PER_STREAM 3
23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
24 #define MAX_NUM_STREAM 7
25 #define ISP_VERSION_47 47
26 #define ISP_VERSION_46 46
27 #define ISP_VERSION_44 44
28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
29 #define ISP_VERSION_40 40
30 #define ISP_VERSION_32 32
31 #define ISP_NATIVE_BUF_BIT (0x10000 << 0)
32 #define ISP0_BIT (0x10000 << 1)
33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
34 #define ISP1_BIT (0x10000 << 2)
35 #define ISP_META_CHANNEL_BIT (0x10000 << 3)
36 #define ISP_SCRATCH_BUF_BIT (0x10000 << 4)
37 #define ISP_OFFLINE_STATS_BIT (0x10000 << 5)
38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
39 #define ISP_STATS_STREAM_BIT 0x80000000
40 struct msm_vfe_cfg_cmd_list;
41 enum ISP_START_PIXEL_PATTERN {
42   ISP_BAYER_RGRGRG,
43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
44   ISP_BAYER_GRGRGR,
45   ISP_BAYER_BGBGBG,
46   ISP_BAYER_GBGBGB,
47   ISP_YUV_YCbYCr,
48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
49   ISP_YUV_YCrYCb,
50   ISP_YUV_CbYCrY,
51   ISP_YUV_CrYCbY,
52   ISP_PIX_PATTERN_MAX
53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
54 };
55 enum msm_vfe_plane_fmt {
56   Y_PLANE,
57   CB_PLANE,
58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
59   CR_PLANE,
60   CRCB_PLANE,
61   CBCR_PLANE,
62   VFE_PLANE_FMT_MAX
63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
64 };
65 enum msm_vfe_input_src {
66   VFE_PIX_0,
67   VFE_RAW_0,
68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
69   VFE_RAW_1,
70   VFE_RAW_2,
71   VFE_SRC_MAX,
72 };
73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
74 enum msm_vfe_axi_stream_src {
75   PIX_ENCODER,
76   PIX_VIEWFINDER,
77   PIX_VIDEO,
78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
79   CAMIF_RAW,
80   IDEAL_RAW,
81   RDI_INTF_0,
82   RDI_INTF_1,
83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
84   RDI_INTF_2,
85   VFE_AXI_SRC_MAX
86 };
87 enum msm_vfe_frame_skip_pattern {
88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
89   NO_SKIP,
90   EVERY_2FRAME,
91   EVERY_3FRAME,
92   EVERY_4FRAME,
93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
94   EVERY_5FRAME,
95   EVERY_6FRAME,
96   EVERY_7FRAME,
97   EVERY_8FRAME,
98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
99   EVERY_16FRAME,
100   EVERY_32FRAME,
101   SKIP_ALL,
102   SKIP_RANGE,
103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
104   MAX_SKIP,
105 };
106 #define MSM_VFE_STREAM_STOP_PERIOD 15
107 enum msm_isp_stats_type {
108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
109   MSM_ISP_STATS_AEC,
110   MSM_ISP_STATS_AF,
111   MSM_ISP_STATS_AWB,
112   MSM_ISP_STATS_RS,
113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
114   MSM_ISP_STATS_CS,
115   MSM_ISP_STATS_IHIST,
116   MSM_ISP_STATS_SKIN,
117   MSM_ISP_STATS_BG,
118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
119   MSM_ISP_STATS_BF,
120   MSM_ISP_STATS_BE,
121   MSM_ISP_STATS_BHIST,
122   MSM_ISP_STATS_BF_SCALE,
123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
124   MSM_ISP_STATS_HDR_BE,
125   MSM_ISP_STATS_HDR_BHIST,
126   MSM_ISP_STATS_AEC_BG,
127   MSM_ISP_STATS_MAX
128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
129 };
130 struct msm_isp_sw_framskip {
131   uint32_t stats_type_mask;
132   uint32_t stream_src_mask;
133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
134   enum msm_vfe_frame_skip_pattern skip_mode;
135   uint32_t min_frame_id;
136   uint32_t max_frame_id;
137 };
138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
139 enum msm_vfe_testgen_color_pattern {
140   COLOR_BAR_8_COLOR,
141   UNICOLOR_WHITE,
142   UNICOLOR_YELLOW,
143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
144   UNICOLOR_CYAN,
145   UNICOLOR_GREEN,
146   UNICOLOR_MAGENTA,
147   UNICOLOR_RED,
148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
149   UNICOLOR_BLUE,
150   UNICOLOR_BLACK,
151   MAX_COLOR,
152 };
153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154 enum msm_vfe_camif_input {
155   CAMIF_DISABLED,
156   CAMIF_PAD_REG_INPUT,
157   CAMIF_MIDDI_INPUT,
158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
159   CAMIF_MIPI_INPUT,
160 };
161 struct msm_vfe_fetch_engine_cfg {
162   uint32_t input_format;
163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
164   uint32_t buf_width;
165   uint32_t buf_height;
166   uint32_t fetch_width;
167   uint32_t fetch_height;
168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
169   uint32_t x_offset;
170   uint32_t y_offset;
171   uint32_t buf_stride;
172 };
173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
174 enum msm_vfe_camif_output_format {
175   CAMIF_QCOM_RAW,
176   CAMIF_MIPI_RAW,
177   CAMIF_PLAIN_8,
178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
179   CAMIF_PLAIN_16,
180   CAMIF_MAX_FORMAT,
181 };
182 struct msm_vfe_camif_subsample_cfg {
183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
184   uint32_t irq_subsample_period;
185   uint32_t irq_subsample_pattern;
186   uint32_t sof_counter_step;
187   uint32_t pixel_skip;
188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
189   uint32_t line_skip;
190   uint32_t first_line;
191   uint32_t last_line;
192   uint32_t first_pixel;
193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
194   uint32_t last_pixel;
195   enum msm_vfe_camif_output_format output_format;
196 };
197 struct msm_vfe_camif_cfg {
198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
199   uint32_t lines_per_frame;
200   uint32_t pixels_per_line;
201   uint32_t first_pixel;
202   uint32_t last_pixel;
203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
204   uint32_t first_line;
205   uint32_t last_line;
206   uint32_t epoch_line0;
207   uint32_t epoch_line1;
208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
209   uint32_t is_split;
210   enum msm_vfe_camif_input camif_input;
211   struct msm_vfe_camif_subsample_cfg subsample_cfg;
212 };
213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
214 struct msm_vfe_testgen_cfg {
215   uint32_t lines_per_frame;
216   uint32_t pixels_per_line;
217   uint32_t v_blank;
218 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
219   uint32_t h_blank;
220   enum ISP_START_PIXEL_PATTERN pixel_bayer_pattern;
221   uint32_t rotate_period;
222   enum msm_vfe_testgen_color_pattern color_bar_pattern;
223 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
224   uint32_t burst_num_frame;
225 };
226 enum msm_vfe_inputmux {
227   CAMIF,
228 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
229   TESTGEN,
230   EXTERNAL_READ,
231 };
232 enum msm_vfe_stats_composite_group {
233 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
234   STATS_COMPOSITE_GRP_NONE,
235   STATS_COMPOSITE_GRP_1,
236   STATS_COMPOSITE_GRP_2,
237   STATS_COMPOSITE_GRP_MAX,
238 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
239 };
240 enum msm_vfe_hvx_streaming_cmd {
241   HVX_DISABLE,
242   HVX_ONE_WAY,
243 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
244   HVX_ROUND_TRIP
245 };
246 struct msm_vfe_pix_cfg {
247   struct msm_vfe_camif_cfg camif_cfg;
248 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
249   struct msm_vfe_testgen_cfg testgen_cfg;
250   struct msm_vfe_fetch_engine_cfg fetch_engine_cfg;
251   enum msm_vfe_inputmux input_mux;
252   enum ISP_START_PIXEL_PATTERN pixel_pattern;
253 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
254   uint32_t input_format;
255   enum msm_vfe_hvx_streaming_cmd hvx_cmd;
256   uint32_t is_split;
257 };
258 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
259 struct msm_vfe_rdi_cfg {
260   uint8_t cid;
261   uint8_t frame_based;
262 };
263 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
264 struct msm_vfe_input_cfg {
265   union {
266     struct msm_vfe_pix_cfg pix_cfg;
267     struct msm_vfe_rdi_cfg rdi_cfg;
268 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
269   } d;
270   enum msm_vfe_input_src input_src;
271   uint32_t input_pix_clk;
272 };
273 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
274 struct msm_vfe_fetch_eng_start {
275   uint32_t session_id;
276   uint32_t stream_id;
277   uint32_t buf_idx;
278 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
279   uint8_t offline_mode;
280   uint32_t fd;
281   uint32_t buf_addr;
282   uint32_t frame_id;
283 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
284 };
285 struct msm_vfe_axi_plane_cfg {
286   uint32_t output_width;
287   uint32_t output_height;
288 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
289   uint32_t output_stride;
290   uint32_t output_scan_lines;
291   uint32_t output_plane_format;
292   uint32_t plane_addr_offset;
293 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
294   uint8_t csid_src;
295   uint8_t rdi_cid;
296 };
297 enum msm_stream_memory_input_t {
298 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
299   MEMORY_INPUT_DISABLED,
300   MEMORY_INPUT_ENABLED
301 };
302 struct msm_vfe_axi_stream_request_cmd {
303 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
304   uint32_t session_id;
305   uint32_t stream_id;
306   uint32_t vt_enable;
307   uint32_t output_format;
308 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
309   enum msm_vfe_axi_stream_src stream_src;
310   struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
311   uint32_t burst_count;
312   uint32_t hfr_mode;
313 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
314   uint8_t frame_base;
315   uint32_t init_frame_drop;
316   enum msm_vfe_frame_skip_pattern frame_skip_pattern;
317   uint8_t buf_divert;
318 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
319   uint32_t axi_stream_handle;
320   uint32_t controllable_output;
321   uint32_t burst_len;
322   enum msm_stream_memory_input_t memory_input;
323 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
324 };
325 struct msm_vfe_axi_stream_release_cmd {
326   uint32_t stream_handle;
327 };
328 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
329 enum msm_vfe_axi_stream_cmd {
330   STOP_STREAM,
331   START_STREAM,
332   STOP_IMMEDIATELY,
333 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
334 };
335 struct msm_vfe_axi_stream_cfg_cmd {
336   uint8_t num_streams;
337   uint32_t stream_handle[VFE_AXI_SRC_MAX];
338 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
339   enum msm_vfe_axi_stream_cmd cmd;
340   uint8_t sync_frame_id_src;
341 };
342 enum msm_vfe_axi_stream_update_type {
343 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
344   ENABLE_STREAM_BUF_DIVERT,
345   DISABLE_STREAM_BUF_DIVERT,
346   UPDATE_STREAM_FRAMEDROP_PATTERN,
347   UPDATE_STREAM_STATS_FRAMEDROP_PATTERN,
348 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
349   UPDATE_STREAM_AXI_CONFIG,
350   UPDATE_STREAM_REQUEST_FRAMES,
351   UPDATE_STREAM_ADD_BUFQ,
352   UPDATE_STREAM_REMOVE_BUFQ,
353 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
354   UPDATE_STREAM_SW_FRAME_DROP,
355   UPDATE_STREAM_REQUEST_FRAMES_VER2,
356 };
357 #define UPDATE_STREAM_REQUEST_FRAMES_VER2 UPDATE_STREAM_REQUEST_FRAMES_VER2
358 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
359 enum msm_vfe_iommu_type {
360   IOMMU_ATTACH,
361   IOMMU_DETACH,
362 };
363 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
364 enum msm_vfe_buff_queue_id {
365   VFE_BUF_QUEUE_DEFAULT,
366   VFE_BUF_QUEUE_SHARED,
367   VFE_BUF_QUEUE_MAX,
368 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
369 };
370 struct msm_vfe_axi_stream_cfg_update_info {
371   uint32_t stream_handle;
372   uint32_t output_format;
373 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
374   uint32_t user_stream_id;
375   uint32_t frame_id;
376   enum msm_vfe_frame_skip_pattern skip_pattern;
377   struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
378 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
379   struct msm_isp_sw_framskip sw_skip_info;
380 };
381 struct msm_vfe_axi_stream_cfg_update_info_req_frm {
382   uint32_t stream_handle;
383 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
384   uint32_t user_stream_id;
385   uint32_t frame_id;
386   uint32_t buf_index;
387 };
388 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
389 struct msm_vfe_axi_halt_cmd {
390   uint32_t stop_camif;
391   uint32_t overflow_detected;
392   uint32_t blocking_halt;
393 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
394 };
395 struct msm_vfe_axi_reset_cmd {
396   uint32_t blocking;
397   uint32_t frame_id;
398 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
399 };
400 struct msm_vfe_axi_restart_cmd {
401   uint32_t enable_camif;
402 };
403 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
404 struct msm_vfe_axi_stream_update_cmd {
405   uint32_t num_streams;
406   enum msm_vfe_axi_stream_update_type update_type;
407   union {
408 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
409     struct msm_vfe_axi_stream_cfg_update_info update_info[MSM_ISP_STATS_MAX];
410     struct msm_vfe_axi_stream_cfg_update_info_req_frm req_frm_ver2;
411   };
412 };
413 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
414 struct msm_vfe_smmu_attach_cmd {
415   uint32_t security_mode;
416   uint32_t iommu_attach_mode;
417 };
418 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
419 struct msm_vfe_stats_stream_request_cmd {
420   uint32_t session_id;
421   uint32_t stream_id;
422   enum msm_isp_stats_type stats_type;
423 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
424   uint32_t composite_flag;
425   uint32_t framedrop_pattern;
426   uint32_t init_frame_drop;
427   uint32_t irq_subsample_pattern;
428 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
429   uint32_t buffer_offset;
430   uint32_t stream_handle;
431 };
432 struct msm_vfe_stats_stream_release_cmd {
433 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
434   uint32_t stream_handle;
435 };
436 struct msm_vfe_stats_stream_cfg_cmd {
437   uint8_t num_streams;
438 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
439   uint32_t stream_handle[MSM_ISP_STATS_MAX];
440   uint8_t enable;
441   uint32_t stats_burst_len;
442 };
443 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
444 enum msm_vfe_reg_cfg_type {
445   VFE_WRITE,
446   VFE_WRITE_MB,
447   VFE_READ,
448 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
449   VFE_CFG_MASK,
450   VFE_WRITE_DMI_16BIT,
451   VFE_WRITE_DMI_32BIT,
452   VFE_WRITE_DMI_64BIT,
453 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
454   VFE_READ_DMI_16BIT,
455   VFE_READ_DMI_32BIT,
456   VFE_READ_DMI_64BIT,
457   GET_MAX_CLK_RATE,
458 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
459   GET_CLK_RATES,
460   GET_ISP_ID,
461   VFE_HW_UPDATE_LOCK,
462   VFE_HW_UPDATE_UNLOCK,
463 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
464   SET_WM_UB_SIZE,
465   SET_UB_POLICY,
466 };
467 struct msm_vfe_cfg_cmd2 {
468 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
469   uint16_t num_cfg;
470   uint16_t cmd_len;
471   void __user * cfg_data;
472   void __user * cfg_cmd;
473 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
474 };
475 struct msm_vfe_cfg_cmd_list {
476   struct msm_vfe_cfg_cmd2 cfg_cmd;
477   struct msm_vfe_cfg_cmd_list * next;
478 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
479   uint32_t next_size;
480 };
481 struct msm_vfe_reg_rw_info {
482   uint32_t reg_offset;
483 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
484   uint32_t cmd_data_offset;
485   uint32_t len;
486 };
487 struct msm_vfe_reg_mask_info {
488 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
489   uint32_t reg_offset;
490   uint32_t mask;
491   uint32_t val;
492 };
493 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
494 struct msm_vfe_reg_dmi_info {
495   uint32_t hi_tbl_offset;
496   uint32_t lo_tbl_offset;
497   uint32_t len;
498 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
499 };
500 struct msm_vfe_reg_cfg_cmd {
501   union {
502     struct msm_vfe_reg_rw_info rw_info;
503 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
504     struct msm_vfe_reg_mask_info mask_info;
505     struct msm_vfe_reg_dmi_info dmi_info;
506   } u;
507   enum msm_vfe_reg_cfg_type cmd_type;
508 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
509 };
510 enum vfe_sd_type {
511   VFE_SD_0 = 0,
512   VFE_SD_1,
513 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
514   VFE_SD_COMMON,
515   VFE_SD_MAX,
516 };
517 #define MS_NUM_SLAVE_MAX 1
518 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
519 enum msm_vfe_dual_hw_type {
520   DUAL_NONE = 0,
521   DUAL_HW_VFE_SPLIT = 1,
522   DUAL_HW_MASTER_SLAVE = 2,
523 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
524 };
525 enum msm_vfe_dual_hw_ms_type {
526   MS_TYPE_NONE,
527   MS_TYPE_MASTER,
528 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
529   MS_TYPE_SLAVE,
530 };
531 struct msm_isp_set_dual_hw_ms_cmd {
532   uint8_t num_src;
533 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
534   enum msm_vfe_dual_hw_ms_type dual_hw_ms_type;
535   enum msm_vfe_input_src primary_intf;
536   enum msm_vfe_input_src input_src[VFE_SRC_MAX];
537   uint32_t sof_delta_threshold;
538 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
539 };
540 enum msm_isp_buf_type {
541   ISP_PRIVATE_BUF,
542   ISP_SHARE_BUF,
543 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
544   MAX_ISP_BUF_TYPE,
545 };
546 struct msm_isp_unmap_buf_req {
547   uint32_t fd;
548 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
549 };
550 struct msm_isp_buf_request {
551   uint32_t session_id;
552   uint32_t stream_id;
553 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
554   uint8_t num_buf;
555   uint32_t handle;
556   enum msm_isp_buf_type buf_type;
557 };
558 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
559 struct msm_isp_qbuf_plane {
560   uint32_t addr;
561   uint32_t offset;
562   uint32_t length;
563 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
564 };
565 struct msm_isp_qbuf_buffer {
566   struct msm_isp_qbuf_plane planes[MAX_PLANES_PER_STREAM];
567   uint32_t num_planes;
568 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
569 };
570 struct msm_isp_qbuf_info {
571   uint32_t handle;
572   int32_t buf_idx;
573 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
574   struct msm_isp_qbuf_buffer buffer;
575   uint32_t dirty_buf;
576 };
577 struct msm_isp_clk_rates {
578 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
579   uint32_t svs_rate;
580   uint32_t nominal_rate;
581   uint32_t high_rate;
582 };
583 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
584 struct msm_vfe_axi_src_state {
585   enum msm_vfe_input_src input_src;
586   uint32_t src_active;
587   uint32_t src_frame_id;
588 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
589 };
590 enum msm_isp_event_mask_index {
591   ISP_EVENT_MASK_INDEX_STATS_NOTIFY = 0,
592   ISP_EVENT_MASK_INDEX_ERROR = 1,
593 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
594   ISP_EVENT_MASK_INDEX_IOMMU_P_FAULT = 2,
595   ISP_EVENT_MASK_INDEX_STREAM_UPDATE_DONE = 3,
596   ISP_EVENT_MASK_INDEX_REG_UPDATE = 4,
597   ISP_EVENT_MASK_INDEX_SOF = 5,
598 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
599   ISP_EVENT_MASK_INDEX_BUF_DIVERT = 6,
600   ISP_EVENT_MASK_INDEX_COMP_STATS_NOTIFY = 7,
601   ISP_EVENT_MASK_INDEX_MASK_FE_READ_DONE = 8,
602   ISP_EVENT_MASK_INDEX_BUF_DONE = 9,
603 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
604   ISP_EVENT_MASK_INDEX_REG_UPDATE_MISSING = 10,
605   ISP_EVENT_MASK_INDEX_PING_PONG_MISMATCH = 11,
606   ISP_EVENT_MASK_INDEX_BUF_FATAL_ERROR = 12,
607 };
608 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
609 #define ISP_EVENT_SUBS_MASK_NONE 0
610 #define ISP_EVENT_SUBS_MASK_STATS_NOTIFY (1 << ISP_EVENT_MASK_INDEX_STATS_NOTIFY)
611 #define ISP_EVENT_SUBS_MASK_ERROR (1 << ISP_EVENT_MASK_INDEX_ERROR)
612 #define ISP_EVENT_SUBS_MASK_IOMMU_P_FAULT (1 << ISP_EVENT_MASK_INDEX_IOMMU_P_FAULT)
613 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
614 #define ISP_EVENT_SUBS_MASK_STREAM_UPDATE_DONE (1 << ISP_EVENT_MASK_INDEX_STREAM_UPDATE_DONE)
615 #define ISP_EVENT_SUBS_MASK_REG_UPDATE (1 << ISP_EVENT_MASK_INDEX_REG_UPDATE)
616 #define ISP_EVENT_SUBS_MASK_SOF (1 << ISP_EVENT_MASK_INDEX_SOF)
617 #define ISP_EVENT_SUBS_MASK_BUF_DIVERT (1 << ISP_EVENT_MASK_INDEX_BUF_DIVERT)
618 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
619 #define ISP_EVENT_SUBS_MASK_COMP_STATS_NOTIFY (1 << ISP_EVENT_MASK_INDEX_COMP_STATS_NOTIFY)
620 #define ISP_EVENT_SUBS_MASK_FE_READ_DONE (1 << ISP_EVENT_MASK_INDEX_MASK_FE_READ_DONE)
621 #define ISP_EVENT_SUBS_MASK_BUF_DONE (1 << ISP_EVENT_MASK_INDEX_BUF_DONE)
622 #define ISP_EVENT_SUBS_MASK_REG_UPDATE_MISSING (1 << ISP_EVENT_MASK_INDEX_REG_UPDATE_MISSING)
623 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
624 #define ISP_EVENT_SUBS_MASK_PING_PONG_MISMATCH (1 << ISP_EVENT_MASK_INDEX_PING_PONG_MISMATCH)
625 #define ISP_EVENT_SUBS_MASK_BUF_FATAL_ERROR (1 << ISP_EVENT_MASK_INDEX_BUF_FATAL_ERROR)
626 enum msm_isp_event_idx {
627   ISP_REG_UPDATE = 0,
628 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
629   ISP_EPOCH_0 = 1,
630   ISP_EPOCH_1 = 2,
631   ISP_START_ACK = 3,
632   ISP_STOP_ACK = 4,
633 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
634   ISP_IRQ_VIOLATION = 5,
635   ISP_STATS_OVERFLOW = 6,
636   ISP_BUF_DONE = 7,
637   ISP_FE_RD_DONE = 8,
638 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
639   ISP_IOMMU_P_FAULT = 9,
640   ISP_ERROR = 10,
641   ISP_HW_FATAL_ERROR = 11,
642   ISP_PING_PONG_MISMATCH = 12,
643 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
644   ISP_REG_UPDATE_MISSING = 13,
645   ISP_BUF_FATAL_ERROR = 14,
646   ISP_EVENT_MAX = 15
647 };
648 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
649 #define ISP_EVENT_OFFSET 8
650 #define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START)
651 #define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET))
652 #define ISP_STATS_EVENT_BASE (ISP_EVENT_BASE + (2 << ISP_EVENT_OFFSET))
653 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
654 #define ISP_CAMIF_EVENT_BASE (ISP_EVENT_BASE + (3 << ISP_EVENT_OFFSET))
655 #define ISP_STREAM_EVENT_BASE (ISP_EVENT_BASE + (4 << ISP_EVENT_OFFSET))
656 #define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE)
657 #define ISP_EVENT_EPOCH_0 (ISP_EVENT_BASE + ISP_EPOCH_0)
658 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
659 #define ISP_EVENT_EPOCH_1 (ISP_EVENT_BASE + ISP_EPOCH_1)
660 #define ISP_EVENT_START_ACK (ISP_EVENT_BASE + ISP_START_ACK)
661 #define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK)
662 #define ISP_EVENT_IRQ_VIOLATION (ISP_EVENT_BASE + ISP_IRQ_VIOLATION)
663 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
664 #define ISP_EVENT_STATS_OVERFLOW (ISP_EVENT_BASE + ISP_STATS_OVERFLOW)
665 #define ISP_EVENT_ERROR (ISP_EVENT_BASE + ISP_ERROR)
666 #define ISP_EVENT_SOF (ISP_CAMIF_EVENT_BASE)
667 #define ISP_EVENT_EOF (ISP_CAMIF_EVENT_BASE + 1)
668 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
669 #define ISP_EVENT_BUF_DONE (ISP_EVENT_BASE + ISP_BUF_DONE)
670 #define ISP_EVENT_BUF_DIVERT (ISP_BUF_EVENT_BASE)
671 #define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE)
672 #define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX)
673 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
674 #define ISP_EVENT_FE_READ_DONE (ISP_EVENT_BASE + ISP_FE_RD_DONE)
675 #define ISP_EVENT_IOMMU_P_FAULT (ISP_EVENT_BASE + ISP_IOMMU_P_FAULT)
676 #define ISP_EVENT_HW_FATAL_ERROR (ISP_EVENT_BASE + ISP_HW_FATAL_ERROR)
677 #define ISP_EVENT_PING_PONG_MISMATCH (ISP_EVENT_BASE + ISP_PING_PONG_MISMATCH)
678 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
679 #define ISP_EVENT_REG_UPDATE_MISSING (ISP_EVENT_BASE + ISP_REG_UPDATE_MISSING)
680 #define ISP_EVENT_BUF_FATAL_ERROR (ISP_EVENT_BASE + ISP_BUF_FATAL_ERROR)
681 #define ISP_EVENT_STREAM_UPDATE_DONE (ISP_STREAM_EVENT_BASE)
682 struct msm_isp_buf_event {
683 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
684   uint32_t session_id;
685   uint32_t stream_id;
686   uint32_t handle;
687   uint32_t output_format;
688 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
689   int8_t buf_idx;
690 };
691 struct msm_isp_fetch_eng_event {
692   uint32_t session_id;
693 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
694   uint32_t stream_id;
695   uint32_t handle;
696   uint32_t fd;
697   int8_t buf_idx;
698 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
699   int8_t offline_mode;
700 };
701 struct msm_isp_stats_event {
702   uint32_t stats_mask;
703 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
704   uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX];
705 };
706 struct msm_isp_stream_ack {
707   uint32_t session_id;
708 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
709   uint32_t stream_id;
710   uint32_t handle;
711 };
712 enum msm_vfe_error_type {
713 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
714   ISP_ERROR_NONE,
715   ISP_ERROR_CAMIF,
716   ISP_ERROR_BUS_OVERFLOW,
717   ISP_ERROR_RETURN_EMPTY_BUFFER,
718 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
719   ISP_ERROR_FRAME_ID_MISMATCH,
720   ISP_ERROR_MAX,
721 };
722 struct msm_isp_error_info {
723 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
724   enum msm_vfe_error_type err_type;
725   uint32_t session_id;
726   uint32_t stream_id;
727   uint32_t stream_id_mask;
728 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
729 };
730 struct msm_isp_ms_delta_info {
731   uint8_t num_delta_info;
732   uint32_t delta[MS_NUM_SLAVE_MAX];
733 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
734 };
735 struct msm_isp_output_info {
736   uint8_t regs_not_updated;
737   uint16_t output_err_mask;
738 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
739   uint8_t stream_framedrop_mask;
740   uint16_t stats_framedrop_mask;
741 };
742 struct msm_isp_sof_info {
743 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
744   uint8_t regs_not_updated;
745   uint16_t reg_update_fail_mask;
746   uint32_t stream_get_buf_fail_mask;
747   uint16_t stats_get_buf_fail_mask;
748 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
749   struct msm_isp_ms_delta_info ms_delta_info;
750 };
751 struct msm_isp_event_data {
752   struct timeval timestamp;
753 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
754   struct timeval mono_timestamp;
755   uint32_t frame_id;
756   union {
757     struct msm_isp_stats_event stats;
758 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
759     struct msm_isp_buf_event buf_done;
760     struct msm_isp_fetch_eng_event fetch_done;
761     struct msm_isp_error_info error_info;
762     struct msm_isp_output_info output_info;
763 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
764     struct msm_isp_sof_info sof_info;
765   } u;
766 };
767 #define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8')
768 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
769 #define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8')
770 #define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8')
771 #define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8')
772 #define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0')
773 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
774 #define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0')
775 #define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0')
776 #define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0')
777 #define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2')
778 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
779 #define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2')
780 #define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2')
781 #define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2')
782 #define V4L2_PIX_FMT_QBGGR14 v4l2_fourcc('Q', 'B', 'G', '4')
783 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
784 #define V4L2_PIX_FMT_QGBRG14 v4l2_fourcc('Q', 'G', 'B', '4')
785 #define V4L2_PIX_FMT_QGRBG14 v4l2_fourcc('Q', 'G', 'R', '4')
786 #define V4L2_PIX_FMT_QRGGB14 v4l2_fourcc('Q', 'R', 'G', '4')
787 #define V4L2_PIX_FMT_P16BGGR10 v4l2_fourcc('P', 'B', 'G', '0')
788 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
789 #define V4L2_PIX_FMT_P16GBRG10 v4l2_fourcc('P', 'G', 'B', '0')
790 #define V4L2_PIX_FMT_P16GRBG10 v4l2_fourcc('P', 'G', 'R', '0')
791 #define V4L2_PIX_FMT_P16RGGB10 v4l2_fourcc('P', 'R', 'G', '0')
792 #define V4L2_PIX_FMT_NV14 v4l2_fourcc('N', 'V', '1', '4')
793 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
794 #define V4L2_PIX_FMT_NV41 v4l2_fourcc('N', 'V', '4', '1')
795 #define V4L2_PIX_FMT_META v4l2_fourcc('Q', 'M', 'E', 'T')
796 #define V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4')
797 #define V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4')
798 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
799 #define V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4')
800 #define V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4')
801 enum msm_isp_ioctl_cmd_code {
802   MSM_VFE_REG_CFG = BASE_VIDIOC_PRIVATE,
803 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
804   MSM_ISP_REQUEST_BUF,
805   MSM_ISP_ENQUEUE_BUF,
806   MSM_ISP_RELEASE_BUF,
807   MSM_ISP_REQUEST_STREAM,
808 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
809   MSM_ISP_CFG_STREAM,
810   MSM_ISP_RELEASE_STREAM,
811   MSM_ISP_INPUT_CFG,
812   MSM_ISP_SET_SRC_STATE,
813 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
814   MSM_ISP_REQUEST_STATS_STREAM,
815   MSM_ISP_CFG_STATS_STREAM,
816   MSM_ISP_RELEASE_STATS_STREAM,
817   MSM_ISP_REG_UPDATE_CMD,
818 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
819   MSM_ISP_UPDATE_STREAM,
820   MSM_VFE_REG_LIST_CFG,
821   MSM_ISP_SMMU_ATTACH,
822   MSM_ISP_UPDATE_STATS_STREAM,
823 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
824   MSM_ISP_AXI_HALT,
825   MSM_ISP_AXI_RESET,
826   MSM_ISP_AXI_RESTART,
827   MSM_ISP_FETCH_ENG_START,
828 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
829   MSM_ISP_DEQUEUE_BUF,
830   MSM_ISP_SET_DUAL_HW_MASTER_SLAVE,
831   MSM_ISP_MAP_BUF_START_FE,
832   MSM_ISP_UNMAP_BUF,
833 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
834 };
835 #define VIDIOC_MSM_VFE_REG_CFG _IOWR('V', MSM_VFE_REG_CFG, struct msm_vfe_cfg_cmd2)
836 #define VIDIOC_MSM_ISP_REQUEST_BUF _IOWR('V', MSM_ISP_REQUEST_BUF, struct msm_isp_buf_request)
837 #define VIDIOC_MSM_ISP_ENQUEUE_BUF _IOWR('V', MSM_ISP_ENQUEUE_BUF, struct msm_isp_qbuf_info)
838 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
839 #define VIDIOC_MSM_ISP_RELEASE_BUF _IOWR('V', MSM_ISP_RELEASE_BUF, struct msm_isp_buf_request)
840 #define VIDIOC_MSM_ISP_REQUEST_STREAM _IOWR('V', MSM_ISP_REQUEST_STREAM, struct msm_vfe_axi_stream_request_cmd)
841 #define VIDIOC_MSM_ISP_CFG_STREAM _IOWR('V', MSM_ISP_CFG_STREAM, struct msm_vfe_axi_stream_cfg_cmd)
842 #define VIDIOC_MSM_ISP_RELEASE_STREAM _IOWR('V', MSM_ISP_RELEASE_STREAM, struct msm_vfe_axi_stream_release_cmd)
843 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
844 #define VIDIOC_MSM_ISP_INPUT_CFG _IOWR('V', MSM_ISP_INPUT_CFG, struct msm_vfe_input_cfg)
845 #define VIDIOC_MSM_ISP_SET_SRC_STATE _IOWR('V', MSM_ISP_SET_SRC_STATE, struct msm_vfe_axi_src_state)
846 #define VIDIOC_MSM_ISP_REQUEST_STATS_STREAM _IOWR('V', MSM_ISP_REQUEST_STATS_STREAM, struct msm_vfe_stats_stream_request_cmd)
847 #define VIDIOC_MSM_ISP_CFG_STATS_STREAM _IOWR('V', MSM_ISP_CFG_STATS_STREAM, struct msm_vfe_stats_stream_cfg_cmd)
848 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
849 #define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM _IOWR('V', MSM_ISP_RELEASE_STATS_STREAM, struct msm_vfe_stats_stream_release_cmd)
850 #define VIDIOC_MSM_ISP_REG_UPDATE_CMD _IOWR('V', MSM_ISP_REG_UPDATE_CMD, enum msm_vfe_input_src)
851 #define VIDIOC_MSM_ISP_UPDATE_STREAM _IOWR('V', MSM_ISP_UPDATE_STREAM, struct msm_vfe_axi_stream_update_cmd)
852 #define VIDIOC_MSM_VFE_REG_LIST_CFG _IOWR('V', MSM_VFE_REG_LIST_CFG, struct msm_vfe_cfg_cmd_list)
853 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
854 #define VIDIOC_MSM_ISP_SMMU_ATTACH _IOWR('V', MSM_ISP_SMMU_ATTACH, struct msm_vfe_smmu_attach_cmd)
855 #define VIDIOC_MSM_ISP_UPDATE_STATS_STREAM _IOWR('V', MSM_ISP_UPDATE_STATS_STREAM, struct msm_vfe_axi_stream_update_cmd)
856 #define VIDIOC_MSM_ISP_AXI_HALT _IOWR('V', MSM_ISP_AXI_HALT, struct msm_vfe_axi_halt_cmd)
857 #define VIDIOC_MSM_ISP_AXI_RESET _IOWR('V', MSM_ISP_AXI_RESET, struct msm_vfe_axi_reset_cmd)
858 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
859 #define VIDIOC_MSM_ISP_AXI_RESTART _IOWR('V', MSM_ISP_AXI_RESTART, struct msm_vfe_axi_restart_cmd)
860 #define VIDIOC_MSM_ISP_FETCH_ENG_START _IOWR('V', MSM_ISP_FETCH_ENG_START, struct msm_vfe_fetch_eng_start)
861 #define VIDIOC_MSM_ISP_DEQUEUE_BUF _IOWR('V', MSM_ISP_DEQUEUE_BUF, struct msm_isp_qbuf_info)
862 #define VIDIOC_MSM_ISP_SET_DUAL_HW_MASTER_SLAVE _IOWR('V', MSM_ISP_SET_DUAL_HW_MASTER_SLAVE, struct msm_isp_set_dual_hw_ms_cmd)
863 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
864 #define VIDIOC_MSM_ISP_MAP_BUF_START_FE _IOWR('V', MSM_ISP_MAP_BUF_START_FE, struct msm_vfe_fetch_eng_start)
865 #define VIDIOC_MSM_ISP_UNMAP_BUF _IOWR('V', MSM_ISP_UNMAP_BUF, struct msm_isp_unmap_buf_req)
866 #endif
867 
868