1 #ifndef _MSM_MDP_EXT_H_ 2 #define _MSM_MDP_EXT_H_ 3 4 #include <linux/msm_mdp.h> 5 6 #define MDP_IOCTL_MAGIC 'S' 7 /* atomic commit ioctl used for validate and commit request */ 8 #define MSMFB_ATOMIC_COMMIT _IOWR(MDP_IOCTL_MAGIC, 128, void *) 9 10 /* 11 * Ioctl for updating the layer position asynchronously. Initially, pipes 12 * should be configured with MDP_LAYER_ASYNC flag set during the atomic commit, 13 * after which any number of position update calls can be made. This would 14 * enable multiple position updates within a single vsync. However, the screen 15 * update would happen only after vsync, which would pick the latest update. 16 * 17 * Limitations: 18 * - Currently supported only for video mode panels with single LM or dual LM 19 * with source_split enabled. 20 * - Only position update is supported with no scaling/cropping. 21 * - Async layers should have unique z_order. 22 */ 23 #define MSMFB_ASYNC_POSITION_UPDATE _IOWR(MDP_IOCTL_MAGIC, 129, \ 24 struct mdp_position_update) 25 26 /* 27 * Ioctl for sending the config information. 28 * QSEED3 coefficeint LUT tables is passed by the user space using this IOCTL. 29 */ 30 #define MSMFB_MDP_SET_CFG _IOW(MDP_IOCTL_MAGIC, 130, \ 31 struct mdp_set_cfg) 32 33 /* 34 * To allow proper structure padding for 64bit/32bit target 35 */ 36 #ifdef __LP64 37 #define MDP_LAYER_COMMIT_V1_PAD 2 38 #else 39 #define MDP_LAYER_COMMIT_V1_PAD 3 40 #endif 41 42 /* 43 * LAYER FLAG CONFIGURATION 44 */ 45 /* left-right layer flip flag */ 46 #define MDP_LAYER_FLIP_LR 0x1 47 48 /* up-down layer flip flag */ 49 #define MDP_LAYER_FLIP_UD 0x2 50 51 /* 52 * This flag enables pixel extension for the current layer. Validate/commit 53 * call uses scale parameters when this flag is enabled. 54 */ 55 #define MDP_LAYER_ENABLE_PIXEL_EXT 0x4 56 57 /* Flag indicates that layer is foreground layer */ 58 #define MDP_LAYER_FORGROUND 0x8 59 60 /* Flag indicates that layer is associated with secure session */ 61 #define MDP_LAYER_SECURE_SESSION 0x10 62 63 /* 64 * Flag indicates that layer is drawing solid fill. Validate/commit call 65 * does not expect buffer when this flag is enabled. 66 */ 67 #define MDP_LAYER_SOLID_FILL 0x20 68 69 /* Layer format is deinterlace */ 70 #define MDP_LAYER_DEINTERLACE 0x40 71 72 /* layer contains bandwidth compressed format data */ 73 #define MDP_LAYER_BWC 0x80 74 75 /* layer is async position updatable */ 76 #define MDP_LAYER_ASYNC 0x100 77 78 /* layer contains postprocessing configuration data */ 79 #define MDP_LAYER_PP 0x200 80 81 /* Flag indicates that layer is associated with secure display session */ 82 #define MDP_LAYER_SECURE_DISPLAY_SESSION 0x400 83 84 /* Flag enabled qseed3 scaling for the current layer */ 85 #define MDP_LAYER_ENABLE_QSEED3_SCALE 0x800 86 87 /* 88 * layer will work in multirect mode, where single hardware should 89 * fetch multiple rectangles with a single hardware 90 */ 91 #define MDP_LAYER_MULTIRECT_ENABLE 0x1000 92 93 /* 94 * if flag present and multirect is enabled, multirect will work in parallel 95 * fetch mode, otherwise it will default to serial fetch mode. 96 */ 97 #define MDP_LAYER_MULTIRECT_PARALLEL_MODE 0x2000 98 99 /* 100 * DESTINATION SCALER FLAG CONFIGURATION 101 */ 102 103 /* Enable/disable Destination scaler */ 104 #define MDP_DESTSCALER_ENABLE 0x1 105 106 /* 107 * Indicating mdp_destination_scaler_data contains 108 * Scaling parameter update. Can be set anytime. 109 */ 110 #define MDP_DESTSCALER_SCALE_UPDATE 0x2 111 112 /* 113 * Indicating mdp_destination_scaler_data contains 114 * Detail enhancement setting update. Can be set anytime. 115 */ 116 #define MDP_DESTSCALER_ENHANCER_UPDATE 0x4 117 118 /* 119 * VALIDATE/COMMIT FLAG CONFIGURATION 120 */ 121 122 /* 123 * Client enables it to inform that call is to validate layers before commit. 124 * If this flag is not set then driver will use MSMFB_ATOMIC_COMMIT for commit. 125 */ 126 #define MDP_VALIDATE_LAYER 0x01 127 128 /* 129 * This flag is only valid for commit call. Commit behavior is synchronous 130 * when this flag is defined. It blocks current call till processing is 131 * complete. Behavior is asynchronous otherwise. 132 */ 133 #define MDP_COMMIT_WAIT_FOR_FINISH 0x02 134 135 /* 136 * This flag is only valid for commit call and used for debugging purpose. It 137 * forces the to wait for sync fences. 138 */ 139 #define MDP_COMMIT_SYNC_FENCE_WAIT 0x04 140 141 /* Flag to enable AVR(Adaptive variable refresh) feature. */ 142 #define MDP_COMMIT_AVR_EN 0x08 143 144 /* 145 * Flag to select one shot mode when AVR feature is enabled. 146 * Default mode is continuous mode. 147 */ 148 #define MDP_COMMIT_AVR_ONE_SHOT_MODE 0x10 149 150 /* Flag to enable concurrent writeback for the frame */ 151 #define MDP_COMMIT_CWB_EN 0x800 152 153 /* 154 * Flag to select DSPP as the data point for CWB. If CWB 155 * is enabled without this flag, LM will be selected as data point. 156 */ 157 #define MDP_COMMIT_CWB_DSPP 0x1000 158 159 #define MDP_COMMIT_VERSION_1_0 0x00010000 160 161 /* 162 * Configuration structures 163 * All parameters are input to driver unless mentioned output parameter 164 * explicitly. 165 */ 166 struct mdp_layer_plane { 167 /* DMA buffer file descriptor information. */ 168 int fd; 169 170 /* Pixel offset in the dma buffer. */ 171 uint32_t offset; 172 173 /* Number of bytes in one scan line including padding bytes. */ 174 uint32_t stride; 175 }; 176 177 struct mdp_layer_buffer { 178 /* layer width in pixels. */ 179 uint32_t width; 180 181 /* layer height in pixels. */ 182 uint32_t height; 183 184 /* 185 * layer format in DRM-style fourcc, refer drm_fourcc.h for 186 * standard formats 187 */ 188 uint32_t format; 189 190 /* plane to hold the fd, offset, etc for all color components */ 191 struct mdp_layer_plane planes[MAX_PLANES]; 192 193 /* valid planes count in layer planes list */ 194 uint32_t plane_count; 195 196 /* compression ratio factor, value depends on the pixel format */ 197 struct mult_factor comp_ratio; 198 199 /* 200 * SyncFence associated with this buffer. It is used in two ways. 201 * 202 * 1. Driver waits to consume the buffer till producer signals in case 203 * of primary and external display. 204 * 205 * 2. Writeback device uses buffer structure for output buffer where 206 * driver is producer. However, client sends the fence with buffer to 207 * indicate that consumer is still using the buffer and it is not ready 208 * for new content. 209 */ 210 int fence; 211 212 /* 32bits reserved value for future usage. */ 213 uint32_t reserved; 214 }; 215 216 /* 217 * One layer holds configuration for one pipe. If client wants to stage single 218 * layer on two pipes then it should send two different layers with relative 219 * (x,y) information. Client must send same information during validate and 220 * commit call. Commit call may fail if client sends different layer information 221 * attached to same pipe during validate and commit. Device invalidate the pipe 222 * once it receives the vsync for that commit. 223 */ 224 struct mdp_input_layer { 225 /* 226 * Flag to enable/disable properties for layer configuration. Refer 227 * layer flag configuration section for all possible flags. 228 */ 229 uint32_t flags; 230 231 /* 232 * Pipe selection for this layer by client. Client provides the index 233 * in validate and commit call. Device reserves the pipe once validate 234 * is successful. Device only uses validated pipe during commit call. 235 * If client sends different layer/pipe configuration in validate & 236 * commit then commit may fail. 237 */ 238 uint32_t pipe_ndx; 239 240 /* 241 * Horizontal decimation value, this indicates the amount of pixels 242 * dropped for each pixel that is fetched from a line. It does not 243 * result in bandwidth reduction because pixels are still fetched from 244 * memory but dropped internally by hardware. 245 * The decimation value given should be power of two of decimation 246 * amount. 247 * 0: no decimation 248 * 1: decimate by 2 (drop 1 pixel for each pixel fetched) 249 * 2: decimate by 4 (drop 3 pixels for each pixel fetched) 250 * 3: decimate by 8 (drop 7 pixels for each pixel fetched) 251 * 4: decimate by 16 (drop 15 pixels for each pixel fetched) 252 */ 253 uint8_t horz_deci; 254 255 /* 256 * Vertical decimation value, this indicates the amount of lines 257 * dropped for each line that is fetched from overlay. It saves 258 * bandwidth because decimated pixels are not fetched. 259 * The decimation value given should be power of two of decimation 260 * amount. 261 * 0: no decimation 262 * 1: decimation by 2 (drop 1 line for each line fetched) 263 * 2: decimation by 4 (drop 3 lines for each line fetched) 264 * 3: decimation by 8 (drop 7 lines for each line fetched) 265 * 4: decimation by 16 (drop 15 lines for each line fetched) 266 */ 267 uint8_t vert_deci; 268 269 /* 270 * Used to set plane opacity. The range can be from 0-255, where 271 * 0 means completely transparent and 255 means fully opaque. 272 */ 273 uint8_t alpha; 274 275 /* 276 * Blending stage to occupy in display, if multiple layers are present, 277 * highest z_order usually means the top most visible layer. The range 278 * acceptable is from 0-7 to support blending up to 8 layers. 279 */ 280 uint16_t z_order; 281 282 /* 283 * Color used as color key for transparency. Any pixel in fetched 284 * image matching this color will be transparent when blending. 285 * The color should be in same format as the source image format. 286 */ 287 uint32_t transp_mask; 288 289 /* 290 * Solid color used to fill the overlay surface when no source 291 * buffer is provided. 292 */ 293 uint32_t bg_color; 294 295 /* blend operation defined in "mdss_mdp_blend_op" enum. */ 296 enum mdss_mdp_blend_op blend_op; 297 298 /* color space of the source */ 299 enum mdp_color_space color_space; 300 301 /* 302 * Source crop rectangle, portion of image that will be fetched. This 303 * should always be within boundaries of source image. 304 */ 305 struct mdp_rect src_rect; 306 307 /* 308 * Destination rectangle, the position and size of image on screen. 309 * This should always be within panel boundaries. 310 */ 311 struct mdp_rect dst_rect; 312 313 /* Scaling parameters. */ 314 void *scale; 315 316 /* Buffer attached with each layer. Device uses it for commit call. */ 317 struct mdp_layer_buffer buffer; 318 319 /* 320 * Source side post processing configuration information for each 321 * layer. 322 */ 323 void *pp_info; 324 325 /* 326 * This is an output parameter. 327 * 328 * Only for validate call. Frame buffer device sets error code 329 * based on validate call failure scenario. 330 */ 331 int error_code; 332 333 /* 32bits reserved value for future usage. */ 334 uint32_t reserved[6]; 335 }; 336 337 struct mdp_output_layer { 338 /* 339 * Flag to enable/disable properties for layer configuration. Refer 340 * layer flag config section for all possible flags. 341 */ 342 uint32_t flags; 343 344 /* 345 * Writeback destination selection for output. Client provides the index 346 * in validate and commit call. 347 */ 348 uint32_t writeback_ndx; 349 350 /* Buffer attached with output layer. Device uses it for commit call */ 351 struct mdp_layer_buffer buffer; 352 353 /* color space of the destination */ 354 enum mdp_color_space color_space; 355 356 /* 32bits reserved value for future usage. */ 357 uint32_t reserved[5]; 358 }; 359 360 /* 361 * Destination scaling info structure holds setup paramaters for upscaling 362 * setting in the destination scaling block. 363 */ 364 struct mdp_destination_scaler_data { 365 /* 366 * Flag to switch between mode for destination scaler. Please Refer to 367 * destination scaler flag config for all possible setting. 368 */ 369 uint32_t flags; 370 371 /* 372 * Destination scaler selection index. Client provides the index in 373 * validate and commit call. 374 */ 375 uint32_t dest_scaler_ndx; 376 377 /* 378 * LM width configuration per Destination scaling updates 379 */ 380 uint32_t lm_width; 381 382 /* 383 * LM height configuration per Destination scaling updates 384 */ 385 uint32_t lm_height; 386 387 /* 388 * The scaling parameters for all the mode except disable. For 389 * disabling the scaler, there is no need to provide the scale. 390 * A userspace pointer points to struct mdp_scale_data_v2. 391 */ 392 uint64_t scale; 393 }; 394 395 /* Enable Deterministic Frame Rate Control (FRC) */ 396 #define MDP_VIDEO_FRC_ENABLE (1 << 0) 397 398 struct mdp_frc_info { 399 /* flags to control FRC feature */ 400 uint32_t flags; 401 /* video frame count per frame */ 402 uint32_t frame_cnt; 403 /* video timestamp per frame in millisecond unit */ 404 int64_t timestamp; 405 }; 406 407 /* 408 * Commit structure holds layer stack send by client for validate and commit 409 * call. If layers are different between validate and commit call then commit 410 * call will also do validation. In such case, commit may fail. 411 */ 412 struct mdp_layer_commit_v1 { 413 /* 414 * Flag to enable/disable properties for commit/validate call. Refer 415 * validate/commit flag config section for all possible flags. 416 */ 417 uint32_t flags; 418 419 /* 420 * This is an output parameter. 421 * 422 * Frame buffer device provides release fence handle to client. It 423 * triggers release fence when display hardware has consumed all the 424 * buffers attached to this commit call and buffer is ready for reuse 425 * for primary and external. For writeback case, it triggers it when 426 * output buffer is ready for consumer. 427 */ 428 int release_fence; 429 430 /* 431 * Left_roi is optional configuration. Client configures it only when 432 * partial update is enabled. It defines the "region of interest" on 433 * left part of panel when it is split display. For non-split display, 434 * it defines the "region of interest" on the panel. 435 */ 436 struct mdp_rect left_roi; 437 438 /* 439 * Right_roi is optional configuration. Client configures it only when 440 * partial update is enabled. It defines the "region of interest" on 441 * right part of panel for split display configuration. It is not 442 * required for non-split display. 443 */ 444 struct mdp_rect right_roi; 445 446 /* Pointer to a list of input layers for composition. */ 447 struct mdp_input_layer *input_layers; 448 449 /* Input layer count present in input list */ 450 uint32_t input_layer_cnt; 451 452 /* 453 * Output layer for writeback display. It supports only one 454 * layer as output layer. This is not required for primary 455 * and external displays 456 */ 457 struct mdp_output_layer *output_layer; 458 459 /* 460 * This is an output parameter. 461 * 462 * Frame buffer device provides retire fence handle if 463 * COMMIT_RETIRE_FENCE flag is set in commit call. It triggers 464 * retire fence when current layers are swapped with new layers 465 * on display hardware. For video mode panel and writeback, 466 * retire fence and release fences are triggered at the same 467 * time while command mode panel triggers release fence first 468 * (on pingpong done) and retire fence (on rdptr done) 469 * after that. 470 */ 471 int retire_fence; 472 473 /* 474 * Scaler data and control for setting up destination scaler. 475 * A userspace pointer that points to a list of 476 * struct mdp_destination_scaler_data. 477 */ 478 void *dest_scaler; 479 480 /* 481 * Represents number of Destination scaler data provied by userspace. 482 */ 483 uint32_t dest_scaler_cnt; 484 485 /* FRC info per device which contains frame count and timestamp */ 486 struct mdp_frc_info *frc_info; 487 488 /* 32-bits reserved value for future usage. */ 489 uint32_t reserved[MDP_LAYER_COMMIT_V1_PAD]; 490 }; 491 492 /* 493 * mdp_overlay_list - argument for ioctl MSMFB_ATOMIC_COMMIT 494 */ 495 struct mdp_layer_commit { 496 /* 497 * 32bit version indicates the commit structure selection 498 * from union. Lower 16bits indicates the minor version while 499 * higher 16bits indicates the major version. It selects the 500 * commit structure based on major version selection. Minor version 501 * indicates that reserved fields are in use. 502 * 503 * Current supported version is 1.0 (Major:1 Minor:0) 504 */ 505 uint32_t version; 506 union { 507 /* Layer commit/validate definition for V1 */ 508 struct mdp_layer_commit_v1 commit_v1; 509 }; 510 }; 511 512 struct mdp_point { 513 uint32_t x; 514 uint32_t y; 515 }; 516 517 /* 518 * Async updatable layers. One layer holds configuration for one pipe. 519 */ 520 struct mdp_async_layer { 521 /* 522 * Flag to enable/disable properties for layer configuration. Refer 523 * layer flag config section for all possible flags. 524 */ 525 uint32_t flags; 526 527 /* 528 * Pipe selection for this layer by client. Client provides the 529 * pipe index that the device reserved during ATOMIC_COMMIT. 530 */ 531 uint32_t pipe_ndx; 532 533 /* Source start x,y. */ 534 struct mdp_point src; 535 536 /* Destination start x,y. */ 537 struct mdp_point dst; 538 539 /* 540 * This is an output parameter. 541 * 542 * Frame buffer device sets error code based on the failure. 543 */ 544 int error_code; 545 546 uint32_t reserved[3]; 547 }; 548 549 /* 550 * mdp_position_update - argument for ioctl MSMFB_ASYNC_POSITION_UPDATE 551 */ 552 struct mdp_position_update { 553 /* Pointer to a list of async updatable input layers */ 554 struct mdp_async_layer *input_layers; 555 556 /* Input layer count present in input list */ 557 uint32_t input_layer_cnt; 558 }; 559 560 #define MAX_DET_CURVES 3 561 struct mdp_det_enhance_data { 562 uint32_t enable; 563 int16_t sharpen_level1; 564 int16_t sharpen_level2; 565 uint16_t clip; 566 uint16_t limit; 567 uint16_t thr_quiet; 568 uint16_t thr_dieout; 569 uint16_t thr_low; 570 uint16_t thr_high; 571 uint16_t prec_shift; 572 int16_t adjust_a[MAX_DET_CURVES]; 573 int16_t adjust_b[MAX_DET_CURVES]; 574 int16_t adjust_c[MAX_DET_CURVES]; 575 }; 576 577 /* Flags to enable Scaler and its sub components */ 578 #define ENABLE_SCALE 0x1 579 #define ENABLE_DETAIL_ENHANCE 0x2 580 #define ENABLE_DIRECTION_DETECTION 0x4 581 582 /* LUT configuration flags */ 583 #define SCALER_LUT_SWAP 0x1 584 #define SCALER_LUT_DIR_WR 0x2 585 #define SCALER_LUT_Y_CIR_WR 0x4 586 #define SCALER_LUT_UV_CIR_WR 0x8 587 #define SCALER_LUT_Y_SEP_WR 0x10 588 #define SCALER_LUT_UV_SEP_WR 0x20 589 590 /* Y/RGB and UV filter configuration */ 591 #define FILTER_EDGE_DIRECTED_2D 0x0 592 #define FILTER_CIRCULAR_2D 0x1 593 #define FILTER_SEPARABLE_1D 0x2 594 #define FILTER_BILINEAR 0x3 595 596 /* Alpha filters */ 597 #define FILTER_ALPHA_DROP_REPEAT 0x0 598 #define FILTER_ALPHA_BILINEAR 0x1 599 600 /** 601 * struct mdp_scale_data_v2 602 * Driver uses this new Data structure for storing all scaling params 603 * This structure contains all pixel extension data and QSEED3 filter 604 * configuration and coefficient table indices 605 */ 606 struct mdp_scale_data_v2 { 607 uint32_t enable; 608 609 /* Init phase values */ 610 int32_t init_phase_x[MAX_PLANES]; 611 int32_t phase_step_x[MAX_PLANES]; 612 int32_t init_phase_y[MAX_PLANES]; 613 int32_t phase_step_y[MAX_PLANES]; 614 615 /* 616 * This should be set to toal horizontal pixels 617 * left + right + width 618 */ 619 uint32_t num_ext_pxls_left[MAX_PLANES]; 620 621 /* Unused param for backward compatibility */ 622 uint32_t num_ext_pxls_right[MAX_PLANES]; 623 624 /* 625 * This should be set to vertical pixels 626 * top + bottom + height 627 */ 628 uint32_t num_ext_pxls_top[MAX_PLANES]; 629 630 /* Unused param for backward compatibility */ 631 uint32_t num_ext_pxls_btm[MAX_PLANES]; 632 633 /* over fetch pixels */ 634 int32_t left_ftch[MAX_PLANES]; 635 int32_t left_rpt[MAX_PLANES]; 636 int32_t right_ftch[MAX_PLANES]; 637 int32_t right_rpt[MAX_PLANES]; 638 639 /* Repeat pixels */ 640 uint32_t top_rpt[MAX_PLANES]; 641 uint32_t btm_rpt[MAX_PLANES]; 642 uint32_t top_ftch[MAX_PLANES]; 643 uint32_t btm_ftch[MAX_PLANES]; 644 645 uint32_t roi_w[MAX_PLANES]; 646 647 /* 648 * alpha plane can only be scaled using bilinear or pixel 649 * repeat/drop, specify these for Y and UV planes only 650 */ 651 uint32_t preload_x[MAX_PLANES]; 652 uint32_t preload_y[MAX_PLANES]; 653 uint32_t src_width[MAX_PLANES]; 654 uint32_t src_height[MAX_PLANES]; 655 656 uint32_t dst_width; 657 uint32_t dst_height; 658 659 uint32_t y_rgb_filter_cfg; 660 uint32_t uv_filter_cfg; 661 uint32_t alpha_filter_cfg; 662 uint32_t blend_cfg; 663 664 uint32_t lut_flag; 665 uint32_t dir_lut_idx; 666 667 /* for Y(RGB) and UV planes*/ 668 uint32_t y_rgb_cir_lut_idx; 669 uint32_t uv_cir_lut_idx; 670 uint32_t y_rgb_sep_lut_idx; 671 uint32_t uv_sep_lut_idx; 672 673 struct mdp_det_enhance_data detail_enhance; 674 675 /* reserved value for future usage. */ 676 uint64_t reserved[8]; 677 }; 678 679 /** 680 * struct mdp_scale_luts_info 681 * This struct pointer is received as payload in SET_CFG_IOCTL when the flags 682 * is set to MDP_QSEED3_LUT_CFG 683 * @dir_lut: Direction detection coefficients table 684 * @cir_lut: Circular coefficeints table 685 * @sep_lut: Separable coefficeints table 686 * @dir_lut_size: Size of direction coefficients table 687 * @cir_lut_size: Size of circular coefficients table 688 * @sep_lut_size: Size of separable coefficients table 689 */ 690 struct mdp_scale_luts_info { 691 uint64_t dir_lut; 692 uint64_t cir_lut; 693 uint64_t sep_lut; 694 uint32_t dir_lut_size; 695 uint32_t cir_lut_size; 696 uint32_t sep_lut_size; 697 }; 698 699 #define MDP_QSEED3_LUT_CFG 0x1 700 701 struct mdp_set_cfg { 702 uint64_t flags; 703 uint32_t len; 704 uint64_t payload; 705 }; 706 #endif 707