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Searched refs:SRegister (Results 1 – 20 of 20) sorted by relevance

/art/compiler/optimizing/
Dcommon_arm.h55 inline vixl::aarch32::SRegister LowSRegisterFrom(Location location) { in LowSRegisterFrom()
57 return vixl::aarch32::SRegister(location.AsFpuRegisterPairLow<vixl::aarch32::SRegister>()); in LowSRegisterFrom()
60 inline vixl::aarch32::SRegister HighSRegisterFrom(Location location) { in HighSRegisterFrom()
62 return vixl::aarch32::SRegister(location.AsFpuRegisterPairHigh<vixl::aarch32::SRegister>()); in HighSRegisterFrom()
82 inline vixl::aarch32::SRegister SRegisterFrom(Location location) { in SRegisterFrom()
84 return vixl::aarch32::SRegister(location.reg()); in SRegisterFrom()
87 inline vixl::aarch32::SRegister OutputSRegister(HInstruction* instr) { in OutputSRegister()
108 inline vixl::aarch32::SRegister InputSRegisterAt(HInstruction* instr, int input_index) { in InputSRegisterAt()
149 inline vixl::aarch32::DRegister DRegisterFromS(vixl::aarch32::SRegister s) { in DRegisterFromS()
207 inline Location LocationFrom(const vixl::aarch32::SRegister& reg) { in LocationFrom()
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Dcode_generator_arm_vixl.h57 static const vixl::aarch32::SRegister kParameterFpuRegistersVIXL[] = {
105 static const vixl::aarch32::SRegister kRuntimeParameterFpuRegistersVIXL[] = {
147 : public CallingConvention<vixl::aarch32::Register, vixl::aarch32::SRegister> {
161 : public CallingConvention<vixl::aarch32::Register, vixl::aarch32::SRegister> {
Dcode_generator_arm_vixl.cc179 __ Vstr(vixl32::SRegister(first), MemOperand(sp, stack_offset)); in SaveContiguousSRegisterList()
183 __ Vstr(vixl32::SRegister(first++), MemOperand(sp, stack_offset)); in SaveContiguousSRegisterList()
213 __ Vstr(vixl32::SRegister(last + 1), MemOperand(sp, stack_offset)); in SaveContiguousSRegisterList()
228 __ Vldr(vixl32::SRegister(first), MemOperand(sp, stack_offset)); in RestoreContiguousSRegisterList()
232 __ Vldr(vixl32::SRegister(first++), MemOperand(sp, stack_offset)); in RestoreContiguousSRegisterList()
261 __ Vldr(vixl32::SRegister(last + 1), MemOperand(sp, stack_offset)); in RestoreContiguousSRegisterList()
1021 stream << vixl32::SRegister(reg); in DumpFloatingPointRegister()
2217 vixl::aarch32::SRegister sreg(LeastSignificantBit(fpu_spill_mask_)); in GenerateFrameEntry()
2234 __ Vpush(SRegisterList(vixl32::SRegister(first), POPCOUNT(fpu_spill_mask_))); in GenerateFrameEntry()
2290 vixl::aarch32::SRegister sreg(LeastSignificantBit(fpu_spill_mask_)); in GenerateFrameExit()
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Dintrinsics_arm_vixl.cc416 vixl32::SRegister in_reg = InputSRegisterAt(invoke, 0); in VisitMathRoundFloat()
418 vixl32::SRegister temp1 = LowSRegisterFrom(invoke->GetLocations()->GetTemp(0)); in VisitMathRoundFloat()
419 vixl32::SRegister temp2 = HighSRegisterFrom(invoke->GetLocations()->GetTemp(0)); in VisitMathRoundFloat()
2560 vixl32::SRegister tmp_s = LowSRegisterFrom(locations->GetTemp(0)); in GenBitCount()
/art/compiler/utils/arm/
Dmanaged_register_arm.h93 constexpr SRegister AsSRegister() const { in AsSRegister()
95 return static_cast<SRegister>(id_ - kNumberOfCoreRegIds); in AsSRegister()
103 constexpr SRegister AsOverlappingDRegisterLow() const { in AsOverlappingDRegisterLow()
106 return static_cast<SRegister>(d_reg * 2); in AsOverlappingDRegisterLow()
109 constexpr SRegister AsOverlappingDRegisterHigh() const { in AsOverlappingDRegisterHigh()
112 return static_cast<SRegister>(d_reg * 2 + 1); in AsOverlappingDRegisterHigh()
190 static constexpr ArmManagedRegister FromSRegister(SRegister r) { in FromSRegister()
220 static constexpr ArmManagedRegister FromSRegisterPair(SRegister r_low) { in FromSRegisterPair()
Dmanaged_register_arm.cc37 SRegister low = AsOverlappingDRegisterLow(); in Overlaps()
38 SRegister high = AsOverlappingDRegisterHigh(); in Overlaps()
39 SRegister other_sreg = other.AsSRegister(); in Overlaps()
Dassembler_arm_vixl.h47 inline dwarf::Reg DWARFReg(vixl32::SRegister reg) { in DWARFReg()
222 void StoreSToOffset(vixl32::SRegister source, vixl32::Register base, int32_t offset);
230 void LoadSFromOffset(vixl32::SRegister reg, vixl32::Register base, int32_t offset);
Dassembler_arm_vixl.cc356 void ArmVIXLAssembler::StoreSToOffset(vixl32::SRegister source, in StoreSToOffset()
368 void ArmVIXLAssembler::LoadSFromOffset(vixl32::SRegister reg, in LoadSFromOffset()
Djni_macro_assembler_arm_vixl.cc52 static inline vixl::aarch32::SRegister AsVIXLSRegister(ArmManagedRegister reg) { in AsVIXLSRegister()
54 return vixl::aarch32::SRegister(reg.RegId() - kNumberOfCoreRegIds); in AsVIXLSRegister()
112 ___ Vpush(SRegisterList(vixl32::SRegister(first), POPCOUNT(fp_spill_mask))); in BuildFrame()
158 ___ Vpop(SRegisterList(vixl32::SRegister(first), POPCOUNT(fp_spill_mask))); in RemoveFrame()
593 SRegisterList sreg_list(vixl32::SRegister(start_sreg), sreg_count); in MoveArguments()
Dmanaged_register_arm_test.cc68 TEST(ArmManagedRegister, SRegister) { in TEST() argument
/art/compiler/utils/arm64/
Dmanaged_register_arm64.h74 constexpr SRegister AsSRegister() const { in AsSRegister()
76 return static_cast<SRegister>(id_ - kNumberOfXRegIds - kNumberOfWRegIds - in AsSRegister()
91 constexpr SRegister AsOverlappingSRegister() const { in AsOverlappingSRegister()
93 return static_cast<SRegister>(AsDRegister()); in AsOverlappingSRegister()
163 static constexpr Arm64ManagedRegister FromSRegister(SRegister r) { in FromSRegister()
176 static constexpr Arm64ManagedRegister FromSRegisterD(SRegister r) { in FromSRegisterD()
Djni_macro_assembler_arm64.h210 void StoreSToOffset(SRegister source, XRegister base, int32_t offset);
222 void LoadSFromOffset(SRegister dest, XRegister base, int32_t offset);
Djni_macro_assembler_arm64.cc126 void Arm64JNIMacroAssembler::StoreSToOffset(SRegister source, XRegister base, int32_t offset) { in StoreSToOffset()
243 void Arm64JNIMacroAssembler::LoadSFromOffset(SRegister dest, XRegister base, int32_t offset) { in LoadSFromOffset()
Dmanaged_register_arm64_test.cc219 TEST(Arm64ManagedRegister, SRegister) { in TEST() argument
/art/runtime/arch/arm/
Dregisters_arm.h57 enum SRegister { enum
93 std::ostream& operator<<(std::ostream& os, const SRegister& rhs);
Dregisters_arm.cc37 std::ostream& operator<<(std::ostream& os, const SRegister& rhs) { in operator <<()
/art/runtime/arch/arm64/
Dregisters_arm64.h153 enum SRegister { enum
189 std::ostream& operator<<(std::ostream& os, const SRegister& rhs);
Dregisters_arm64.cc65 std::ostream& operator<<(std::ostream& os, const SRegister& rhs) { in operator <<()
/art/compiler/jni/quick/arm64/
Dcalling_convention_arm64.cc44 static const SRegister kSArgumentRegisters[] = {
/art/compiler/jni/quick/arm/
Dcalling_convention_arm.cc53 static const SRegister kHFSArgumentRegisters[] = {