| /art/compiler/optimizing/ |
| D | register_allocation_resolver.cc | 194 Location destination = phi->GetLiveInterval()->ToLocation(); in Resolve() local
195 InsertParallelMoveAtExitOf(predecessor, phi, source, destination); in Resolve()
380 Location destination = next_sibling->ToLocation(); in ConnectSiblings() local
381 InsertParallelMoveAt(current->GetEnd(), interval->GetDefinedBy(), source, destination); in ConnectSiblings()
428 LiveInterval* destination = interval->GetSiblingAt(destination_position); in ConnectSplitSiblings() local
431 if (destination == source) { in ConnectSplitSiblings()
439 (destination == nullptr || !destination->CoversSlow(destination_position))) { in ConnectSplitSiblings()
452 if (!destination->HasRegister()) { in ConnectSplitSiblings()
478 DCHECK(destination->CoversSlow(destination_position)); in ConnectSplitSiblings()
488 destination->ToLocation()); in ConnectSplitSiblings()
[all …]
|
| D | register_allocation_resolver.h | 70 Location destination) const;
74 Location destination) const;
75 void InsertMoveAfter(HInstruction* instruction, Location source, Location destination) const;
79 Location destination) const;
83 Location destination) const;
86 Location destination,
|
| D | parallel_move_resolver.cc | 140 Location destination = move->MarkPending(); in PerformMove() local
149 if (other_move.Blocks(destination) && !other_move.IsPending()) { in PerformMove()
175 moves_[index]->ClearPending(destination); in PerformMove()
183 move->ClearPending(destination); in PerformMove()
187 if (move->GetSource().Equals(destination)) { in PerformMove()
202 if (other_move->Blocks(destination)) { in PerformMove()
328 Location destination = move->GetDestination(); in EmitNativeCode() local
329 if (!move->IsEliminated() && !destination.IsStackSlot() && !destination.IsDoubleStackSlot()) { in EmitNativeCode()
341 UpdateMoveSource(source, destination); in EmitNativeCode()
428 Location destination = move->MarkPending(); in PerformMove() local
[all …]
|
| D | code_generator_x86.cc | 1330 void CodeGeneratorX86::Move32(Location destination, Location source) { in Move32() argument
1331 if (source.Equals(destination)) { in Move32()
1334 if (destination.IsRegister()) { in Move32()
1336 __ movl(destination.AsRegister<Register>(), source.AsRegister<Register>()); in Move32()
1338 __ movd(destination.AsRegister<Register>(), source.AsFpuRegister<XmmRegister>()); in Move32()
1341 __ movl(destination.AsRegister<Register>(), Address(ESP, source.GetStackIndex())); in Move32()
1343 } else if (destination.IsFpuRegister()) { in Move32()
1345 __ movd(destination.AsFpuRegister<XmmRegister>(), source.AsRegister<Register>()); in Move32()
1347 __ movaps(destination.AsFpuRegister<XmmRegister>(), source.AsFpuRegister<XmmRegister>()); in Move32()
1350 __ movss(destination.AsFpuRegister<XmmRegister>(), Address(ESP, source.GetStackIndex())); in Move32()
[all …]
|
| D | code_generator_x86_64.cc | 1540 void CodeGeneratorX86_64::Move(Location destination, Location source) { in Move() argument
1541 if (source.Equals(destination)) { in Move()
1544 if (destination.IsRegister()) { in Move()
1545 CpuRegister dest = destination.AsRegister<CpuRegister>(); in Move()
1563 } else if (destination.IsFpuRegister()) { in Move()
1564 XmmRegister dest = destination.AsFpuRegister<XmmRegister>(); in Move()
1583 } else if (destination.IsStackSlot()) { in Move()
1585 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1588 __ movss(Address(CpuRegister(RSP), destination.GetStackIndex()), in Move()
1593 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), Immediate(value)); in Move()
[all …]
|
| D | code_generator_arm_vixl.cc | 2492 void CodeGeneratorARMVIXL::Move32(Location destination, Location source) { in Move32() argument
2493 if (source.Equals(destination)) { in Move32()
2496 if (destination.IsRegister()) { in Move32()
2498 __ Mov(RegisterFrom(destination), RegisterFrom(source)); in Move32()
2500 __ Vmov(RegisterFrom(destination), SRegisterFrom(source)); in Move32()
2503 RegisterFrom(destination), in Move32()
2507 } else if (destination.IsFpuRegister()) { in Move32()
2509 __ Vmov(SRegisterFrom(destination), RegisterFrom(source)); in Move32()
2511 __ Vmov(SRegisterFrom(destination), SRegisterFrom(source)); in Move32()
2513 GetAssembler()->LoadSFromOffset(SRegisterFrom(destination), sp, source.GetStackIndex()); in Move32()
[all …]
|
| D | code_generator_arm64.h | 311 virtual void LoadSIMDRegFromStack(Location destination, Location source) = 0;
312 virtual void MoveSIMDRegToSIMDReg(Location destination, Location source) = 0;
313 virtual void MoveToSIMDStackSlot(Location destination, Location source) = 0;
455 void LoadSIMDRegFromStack(Location destination, Location source) override;
456 void MoveSIMDRegToSIMDReg(Location destination, Location source) override;
457 void MoveToSIMDStackSlot(Location destination, Location source) override;
488 void LoadSIMDRegFromStack(Location destination, Location source) override;
489 void MoveSIMDRegToSIMDReg(Location destination, Location source) override;
490 void MoveToSIMDStackSlot(Location destination, Location source) override;
636 void MoveConstant(vixl::aarch64::CPURegister destination, HConstant* constant);
[all …]
|
| D | parallel_move_resolver.h | 180 void AddPendingMove(Location source, Location destination, DataType::Type type);
|
| D | code_generator_arm64.cc | 1423 void CodeGeneratorARM64::MoveConstant(CPURegister destination, HConstant* constant) { in MoveConstant() argument
1425 __ Mov(Register(destination), constant->AsIntConstant()->GetValue()); in MoveConstant()
1427 __ Mov(Register(destination), constant->AsLongConstant()->GetValue()); in MoveConstant()
1429 __ Mov(Register(destination), 0); in MoveConstant()
1431 __ Fmov(VRegister(destination), constant->AsFloatConstant()->GetValue()); in MoveConstant()
1434 __ Fmov(VRegister(destination), constant->AsDoubleConstant()->GetValue()); in MoveConstant()
1463 void CodeGeneratorARM64::MoveLocation(Location destination, in MoveLocation() argument
1466 if (source.Equals(destination)) { in MoveLocation()
1476 if (destination.IsRegister() || destination.IsFpuRegister()) { in MoveLocation()
1484 dst_type = destination.IsRegister() ? DataType::Type::kInt32 : DataType::Type::kFloat32; in MoveLocation()
[all …]
|
| D | code_generator_vector_arm64_sve.cc | 1527 void InstructionCodeGeneratorARM64Sve::LoadSIMDRegFromStack(Location destination, in LoadSIMDRegFromStack() argument
1530 __ Ldr(QRegisterFrom(destination), StackOperandFrom(source)); in LoadSIMDRegFromStack()
1533 void InstructionCodeGeneratorARM64Sve::MoveSIMDRegToSIMDReg(Location destination, in MoveSIMDRegToSIMDReg() argument
1536 __ Mov(QRegisterFrom(destination), QRegisterFrom(source)); in MoveSIMDRegToSIMDReg()
1539 void InstructionCodeGeneratorARM64Sve::MoveToSIMDStackSlot(Location destination, in MoveToSIMDStackSlot() argument
1541 DCHECK(destination.IsSIMDStackSlot()); in MoveToSIMDStackSlot()
1545 __ Str(QRegisterFrom(source), StackOperandFrom(destination)); in MoveToSIMDStackSlot()
1552 __ Str(temp, MemOperand(sp, destination.GetStackIndex())); in MoveToSIMDStackSlot()
1554 __ Str(temp, MemOperand(sp, destination.GetStackIndex() + kArm64WordSize)); in MoveToSIMDStackSlot()
1558 __ Str(temp, StackOperandFrom(destination)); in MoveToSIMDStackSlot()
|
| D | code_generator_vector_arm64_neon.cc | 1527 void InstructionCodeGeneratorARM64Neon::LoadSIMDRegFromStack(Location destination, in LoadSIMDRegFromStack() argument
1530 __ Ldr(QRegisterFrom(destination), StackOperandFrom(source)); in LoadSIMDRegFromStack()
1533 void InstructionCodeGeneratorARM64Neon::MoveSIMDRegToSIMDReg(Location destination, in MoveSIMDRegToSIMDReg() argument
1536 __ Mov(QRegisterFrom(destination), QRegisterFrom(source)); in MoveSIMDRegToSIMDReg()
1539 void InstructionCodeGeneratorARM64Neon::MoveToSIMDStackSlot(Location destination, in MoveToSIMDStackSlot() argument
1541 DCHECK(destination.IsSIMDStackSlot()); in MoveToSIMDStackSlot()
1545 __ Str(QRegisterFrom(source), StackOperandFrom(destination)); in MoveToSIMDStackSlot()
1552 __ Str(temp, MemOperand(sp, destination.GetStackIndex())); in MoveToSIMDStackSlot()
1554 __ Str(temp, MemOperand(sp, destination.GetStackIndex() + kArm64WordSize)); in MoveToSIMDStackSlot()
1558 __ Str(temp, StackOperandFrom(destination)); in MoveToSIMDStackSlot()
|
| D | code_generator_x86.h | 356 void MoveConstant(Location destination, int32_t value) override;
433 void Move32(Location destination, Location source);
435 void Move64(Location destination, Location source);
|
| D | code_generator_x86_64.h | 339 void MoveConstant(Location destination, int32_t value) override;
425 void Move(Location destination, Location source);
|
| D | instruction_builder.h | 207 uint8_t destination,
|
| D | code_generator_arm_vixl.h | 460 void MoveConstant(Location destination, int32_t value) override;
512 void Move32(Location destination, Location source);
|
| D | instruction_simplifier.cc | 2215 HInstruction* destination = instruction->InputAt(2); in SimplifySystemArrayCopy() local
2221 if (CanEnsureNotNullAt(destination, instruction)) { in SimplifySystemArrayCopy()
2224 if (destination == source) { in SimplifySystemArrayCopy()
2232 if (IsArrayLengthOf(count, destination)) { in SimplifySystemArrayCopy()
2240 ReferenceTypeInfo destination_rti = destination->GetReferenceTypeInfo(); in SimplifySystemArrayCopy()
|
| D | instruction_builder.cc | 2330 uint8_t destination, in BuildTypeCheck() argument
2370 UpdateLocal(destination, current_block_->GetLastInstruction()); in BuildTypeCheck()
3369 uint8_t destination = instruction.VRegA_22c(); in ProcessDexInstruction() local
3372 BuildTypeCheck(instruction, destination, reference, type_index, dex_pc); in ProcessDexInstruction()
|
| D | code_generator.h | 218 virtual void MoveConstant(Location destination, int32_t value) = 0;
|
| D | nodes.h | 7777 Location destination, in MoveOperands() argument
7780 : source_(source), destination_(destination), type_(type), instruction_(instruction) {} in MoveOperands()
7861 Location destination, in AddMove() argument
7865 DCHECK(destination.IsValid()); in AddMove()
7876 DCHECK_NE(destination.GetKind(), move.GetDestination().GetKind()) in AddMove()
7885 DCHECK(!destination.OverlapsWith(move.GetDestination())) in AddMove()
7888 << source << " ==> " << destination; in AddMove()
7891 moves_.emplace_back(source, destination, type, instruction); in AddMove()
|
| /art/runtime/verifier/ |
| D | verifier_deps.cc | 354 ObjPtr<mirror::Class> destination, in FindOneClassPathBoundaryForInterface() argument
356 DCHECK(destination->IsInterface()); in FindOneClassPathBoundaryForInterface()
357 DCHECK(IsInClassPath(destination)); in FindOneClassPathBoundaryForInterface()
369 if (direct == destination) { in FindOneClassPathBoundaryForInterface()
389 if (direct == destination) { in FindOneClassPathBoundaryForInterface()
400 if (destination->IsAssignableFrom(boundary)) { in FindOneClassPathBoundaryForInterface()
409 ObjPtr<mirror::Class> destination, in AddAssignability() argument
419 DCHECK(destination != nullptr); in AddAssignability()
422 if (destination->IsPrimitive() || source->IsPrimitive()) { in AddAssignability()
435 if (destination == source || in AddAssignability()
[all …]
|
| D | verifier_deps.h | 115 ObjPtr<mirror::Class> destination,
266 ObjPtr<mirror::Class> FindOneClassPathBoundaryForInterface(ObjPtr<mirror::Class> destination,
321 ObjPtr<mirror::Class> destination,
|
| /art/test/646-checker-arraycopy-large-cst-pos/ |
| D | info.txt | 3 constant destination position, on ARM64, with read barriers
|
| /art/tools/veridex/ |
| D | flow_analysis.cc | 639 uint8_t destination = instruction.VRegA_22c(); in ProcessDexInstruction() local
640 UpdateRegister(destination, VeriClass::boolean_); in ProcessDexInstruction()
|
| /art/runtime/native/ |
| D | dalvik_system_DexFile.cc | 284 jbyte* destination = reinterpret_cast<jbyte*>(dex_data.Begin()); in DexFile_openInMemoryDexFilesNative() local
285 env->GetByteArrayRegion(array, start, end - start, destination); in DexFile_openInMemoryDexFilesNative()
|
| /art/cmdline/ |
| D | README.md | 244 successfully stored, the parser will automatically save it into the target destination as a side
|