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Searched refs:sp (Results 26 – 48 of 48) sorted by relevance

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/art/runtime/interpreter/mterp/arm64ng/
Dcontrol_flow.S168 mov sp, ip
169 .cfi_def_cfa sp, CALLEE_SAVES_SIZE
Darray.S151 ldr x1, [sp]
Dother.S60 ldr x1, [sp]
/art/runtime/interpreter/mterp/arm64/
Dmain.S317 stp \reg1, \reg2, [sp, #(\offset)]
326 ldp \reg1, \reg2, [sp, #(\offset)]
335 stp \reg1, \reg2, [sp, #-(\frame_adjustment)]!
345 ldp \reg1, \reg2, [sp], #(\frame_adjustment)
409 add fp, sp, #64
/art/test/1945-proxy-method-arguments/
Dget_args.cc84 ArtMethod** sp)
/art/runtime/
Dstack.h286 ArtMethod** sp = GetCurrentQuickFrame(); in GetCurrentHandleScope() local
288 return reinterpret_cast<HandleScope*>(reinterpret_cast<uintptr_t>(sp) + pointer_size); in GetCurrentHandleScope()
Dstack.cc143 extern "C" mirror::Object* artQuickGetProxyThisObject(ArtMethod** sp)
346 const uint8_t* sp = reinterpret_cast<const uint8_t*>(cur_quick_frame_); in GetVRegFromOptimizedCode() local
347 *val = *reinterpret_cast<const uint32_t*>(sp + location.GetStackOffsetInBytes()); in GetVRegFromOptimizedCode()
563 uintptr_t sp = reinterpret_cast<uintptr_t>(GetCurrentQuickFrame()); in GetReturnPcAddr() local
564 DCHECK_NE(sp, 0u); in GetReturnPcAddr()
565 return sp + GetCurrentQuickFrameInfo().GetReturnPcOffset(); in GetReturnPcAddr()
Dcha.cc231 uint8_t* sp = reinterpret_cast<uint8_t*>(GetCurrentQuickFrame()); in SetShouldDeoptimizeFlag() local
237 uint8_t* should_deoptimize_addr = sp + offset; in SetShouldDeoptimizeFlag()
Druntime_common.cc276 DumpRegister64(os, "sp", context.sp); in Dump()
Dthread.cc1898 sched_param sp; in DumpState() local
1905 int sched_getparam_result = sched_getparam(tid, &sp); in DumpState()
1908 sp.sched_priority = -1; in DumpState()
1911 CHECK_PTHREAD_CALL(pthread_getschedparam, (thread->tlsPtr_.pthread_self, &policy, &sp), in DumpState()
1914 os << " sched=" << policy << "/" << sp.sched_priority in DumpState()
3673 extern std::vector<StackReference<mirror::Object>*> GetProxyReferenceArguments(ArtMethod** sp)
/art/compiler/optimizing/
Dcode_generator_arm_vixl.cc179 __ Vstr(vixl32::SRegister(first), MemOperand(sp, stack_offset)); in SaveContiguousSRegisterList()
183 __ Vstr(vixl32::SRegister(first++), MemOperand(sp, stack_offset)); in SaveContiguousSRegisterList()
199 __ Vstr(d_reg, MemOperand(sp, stack_offset)); in SaveContiguousSRegisterList()
202 vixl32::Register base = sp; in SaveContiguousSRegisterList()
205 __ Add(base, sp, Operand::From(stack_offset)); in SaveContiguousSRegisterList()
213 __ Vstr(vixl32::SRegister(last + 1), MemOperand(sp, stack_offset)); in SaveContiguousSRegisterList()
228 __ Vldr(vixl32::SRegister(first), MemOperand(sp, stack_offset)); in RestoreContiguousSRegisterList()
232 __ Vldr(vixl32::SRegister(first++), MemOperand(sp, stack_offset)); in RestoreContiguousSRegisterList()
247 __ Vldr(d_reg, MemOperand(sp, stack_offset)); in RestoreContiguousSRegisterList()
250 vixl32::Register base = sp; in RestoreContiguousSRegisterList()
[all …]
Dcommon_arm64.h177 return vixl::aarch64::MemOperand(vixl::aarch64::sp, location.GetStackIndex()); in StackOperandFrom()
Dcode_generator_vector_arm64_sve.cc1551 __ Ldr(temp, MemOperand(sp, source.GetStackIndex())); in MoveToSIMDStackSlot()
1552 __ Str(temp, MemOperand(sp, destination.GetStackIndex())); in MoveToSIMDStackSlot()
1553 __ Ldr(temp, MemOperand(sp, source.GetStackIndex() + kArm64WordSize)); in MoveToSIMDStackSlot()
1554 __ Str(temp, MemOperand(sp, destination.GetStackIndex() + kArm64WordSize)); in MoveToSIMDStackSlot()
Dcode_generator_vector_arm64_neon.cc1551 __ Ldr(temp, MemOperand(sp, source.GetStackIndex())); in MoveToSIMDStackSlot()
1552 __ Str(temp, MemOperand(sp, destination.GetStackIndex())); in MoveToSIMDStackSlot()
1553 __ Ldr(temp, MemOperand(sp, source.GetStackIndex() + kArm64WordSize)); in MoveToSIMDStackSlot()
1554 __ Str(temp, MemOperand(sp, destination.GetStackIndex() + kArm64WordSize)); in MoveToSIMDStackSlot()
Dcode_generator_arm64.cc1134 __ Ldr(method, MemOperand(sp, 0)); in MaybeIncrementHotness()
1163 __ Stp(kArtMethodRegister, lr, MemOperand(sp, 0)); in MaybeIncrementHotness()
1165 __ Str(kArtMethodRegister, MemOperand(sp, 0)); in MaybeIncrementHotness()
1178 __ Ldr(lr, MemOperand(sp, 8)); in MaybeIncrementHotness()
1196 __ Sub(temp, sp, static_cast<int32_t>(GetStackOverflowReservedBytes(InstructionSet::kArm64))); in GenerateFrameEntry()
1231 __ Stp(kArtMethodRegister, lowest_spill, MemOperand(sp, -frame_size, PreIndex)); in GenerateFrameEntry()
1233 __ Str(kArtMethodRegister, MemOperand(sp, -frame_size, PreIndex)); in GenerateFrameEntry()
1248 __ Str(wzr, MemOperand(sp, GetStackOffsetOfShouldDeoptimizeFlag())); in GenerateFrameEntry()
1277 __ Ldp(xzr, lowest_spill, MemOperand(sp, frame_size, PostIndex)); in GenerateFrameExit()
1387 __ Str(reg, MemOperand(sp, stack_index)); in SaveCoreRegister()
[all …]
/art/runtime/interpreter/mterp/arm/
Dmain.S385 stmfd sp!, {r3-r10,fp,lr} @ save 10 regs, (r3 just to align 64)
737 ldmfd sp!, {r3-r10,fp,pc} @ restore 10 regs and return
748 ldmfd sp!, {r3-r10,fp,pc} @ restore 10 regs and return
/art/compiler/utils/arm64/
Dassembler_arm64.h143 return vixl::aarch64::sp; in reg_x()
Djni_macro_assembler_arm64.cc457 ___ Str(scratch, MEM_OP(sp, fr_offs.Int32Value())); in CopyRawPtrFromThread()
Dmanaged_register_arm64_test.cc632 EXPECT_TRUE(vixl::aarch64::sp.Is(Arm64Assembler::reg_x(SP))); in TEST()
/art/runtime/arch/arm64/
Dcontext_arm64.cc29 #define __hwasan_handle_longjmp(sp) argument
/art/runtime/entrypoints/
Dentrypoint_utils.h197 ArtMethod* GetCalleeSaveMethodCaller(ArtMethod** sp,
/art/test/510-checker-try-catch/smali/
DRuntime.smali393 ## CHECK-NEXT: ParallelMove moves:[{{.*->}}{{\d+}}(sp)]
395 ## CHECK-NEXT: ParallelMove moves:[{{.*->}}{{\d+}}(sp)]
443 ## CHECK-NEXT: ParallelMove moves:[{{.*->}}2x{{\d+}}(sp)]
445 ## CHECK-NEXT: ParallelMove moves:[{{.*->}}2x{{\d+}}(sp)]
/art/libnativeloader/
DREADME.md32 with the [VNDK-SP](https://source.android.com/devices/architecture/vndk#sp-hal)

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